Brandon Breitenstein 3790a42003 Revert "soc/intel/apollolake: Do not use StackBase FSP-M parameter" ...

This reverts commit 5ede3d8cce.
No longer needed due to FSP being updated, with the 139_40 release,
to accept StackBase field

BUG=chrome-os-partner:52784
BRANCH=none
TEST=built and booted with FSP 139_40

Change-Id: Ic832d8dc4ca87631f5fef80d4d41558d9a72630a
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/15068
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-06-10 03:43:14 +02:00

..

acpi

acpi/: add missing license header

2016-01-14 22:52:11 +01:00

arch

mainboard: Support ROM_SIZE > 16 MiB

2016-06-09 22:45:51 +02:00

commonlib

commonlib/lz4: Avoid unaligned memory access on RISC-V

2016-05-31 21:07:03 +02:00

console

console/post: be explicit about conditional cmos_post_log() compiling

2016-05-25 18:04:11 +02:00

cpu

AGESA vendorcode: Build a common amdlib

2016-05-18 10:44:43 +02:00

device

device: i2c: Add support for I2C bus operations

2016-06-09 17:05:40 +02:00

drivers

soc/intel/apollolake: Update FSP header files

2016-06-09 20:25:58 +02:00

ec

chromeec: Move EC image hash to separate file in CBFS

2016-06-03 17:24:26 +02:00

include

lib: Add asmlinkage attribute to bootblock_main_with_timestamp

2016-06-09 17:15:35 +02:00

lib

lib: Build reg_script for bootblock

2016-06-09 17:43:53 +02:00

mainboard

mainboard: Support ROM_SIZE > 16 MiB

2016-06-09 22:45:51 +02:00

northbridge

nb/intel/x4x: Fix unpopulated value

2016-06-04 23:46:05 +02:00

soc

Revert "soc/intel/apollolake: Do not use StackBase FSP-M parameter"

2016-06-10 03:43:14 +02:00

southbridge

drivers/lenovo: Add hybrid graphics driver

2016-06-01 23:22:01 +02:00

superio

sio/winbond/w83667hg-a: Add pinmux defines for UART B

2016-05-29 19:34:54 +02:00

vendorcode

util/checklist: Add bootblock support

2016-06-09 23:10:40 +02:00

Kconfig

Add Board Checklist Support

2016-06-03 17:29:13 +02:00