Add a Kconfig value to enable display of FSP header. Move the display code into a separate module to remove it entirely from the final image. TEST=Build and run on Galileo Gen2 Change-Id: I7047a9e58e6a6481c8453dbfebfbfe69dc8823d8 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16002 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
127 lines
3.3 KiB
C
127 lines
3.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015-2016 Intel Corp.
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* (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
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* (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <arch/io.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <fsp/util.h>
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#include <lib.h>
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#include <reset.h>
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#include <string.h>
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static bool looks_like_fsp_header(const uint8_t *raw_hdr)
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{
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if (memcmp(raw_hdr, FSP_HDR_SIGNATURE, 4)) {
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printk(BIOS_ALERT, "Did not find a valid FSP signature\n");
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return false;
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}
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if (read32(raw_hdr + 4) != FSP_HDR_LEN) {
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printk(BIOS_ALERT, "FSP header has invalid length\n");
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return false;
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}
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return true;
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}
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enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob)
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{
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const uint8_t *raw_hdr = fsp_blob;
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if (!looks_like_fsp_header(raw_hdr))
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return CB_ERR;
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hdr->spec_version = read8(raw_hdr + 10);
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hdr->revision = read8(raw_hdr + 11);
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hdr->fsp_revision = read32(raw_hdr + 12);
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memcpy(hdr->image_id, raw_hdr + 16, ARRAY_SIZE(hdr->image_id));
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hdr->image_id[ARRAY_SIZE(hdr->image_id) - 1] = '\0';
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hdr->image_size = read32(raw_hdr + 24);
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hdr->image_base = read32(raw_hdr + 28);
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hdr->image_attribute = read16(raw_hdr + 32);
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hdr->component_attribute = read16(raw_hdr + 34);
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hdr->cfg_region_offset = read32(raw_hdr + 36);
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hdr->cfg_region_size = read32(raw_hdr + 40);
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hdr->notify_phase_entry_offset = read32(raw_hdr + 56);
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hdr->memory_init_entry_offset = read32(raw_hdr + 60);
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hdr->silicon_init_entry_offset = read32(raw_hdr + 68);
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return CB_SUCCESS;
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}
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enum cb_err fsp_validate_component(struct fsp_header *hdr,
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const struct region_device *rdev)
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{
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void *membase;
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/* Map just enough of the file to be able to parse the header. */
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membase = rdev_mmap(rdev, FSP_HDR_OFFSET, FSP_HDR_LEN);
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if (membase == NULL) {
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printk(BIOS_ERR, "Could not mmap() FSP header.\n");
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return CB_ERR;
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}
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if (fsp_identify(hdr, membase) != CB_SUCCESS) {
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rdev_munmap(rdev, membase);
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printk(BIOS_ERR, "No valid FSP header\n");
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return CB_ERR;
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}
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rdev_munmap(rdev, membase);
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if (IS_ENABLED(CONFIG_DISPLAY_FSP_HEADER))
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fsp_print_header_info(hdr);
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/* Check if size specified in the header matches the cbfs file size */
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if (region_device_sz(rdev) < hdr->image_size) {
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printk(BIOS_ERR, "Component size bigger than cbfs file.\n");
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return CB_ERR;
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}
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return CB_SUCCESS;
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}
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static bool fsp_reset_requested(enum fsp_status status)
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{
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return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
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status <= FSP_STATUS_RESET_REQUIRED_8);
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}
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void fsp_handle_reset(enum fsp_status status)
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{
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if (!fsp_reset_requested(status))
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return;
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printk(BIOS_DEBUG, "FSP: handling reset type %x\n", status);
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switch(status) {
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case FSP_STATUS_RESET_REQUIRED_COLD:
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hard_reset();
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break;
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case FSP_STATUS_RESET_REQUIRED_WARM:
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soft_reset();
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break;
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case FSP_STATUS_RESET_REQUIRED_3:
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case FSP_STATUS_RESET_REQUIRED_4:
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case FSP_STATUS_RESET_REQUIRED_5:
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case FSP_STATUS_RESET_REQUIRED_6:
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case FSP_STATUS_RESET_REQUIRED_7:
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case FSP_STATUS_RESET_REQUIRED_8:
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chipset_handle_reset(status);
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break;
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default:
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break;
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}
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}
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