3b03206426
This change copies src/arch/x86/memlayout.ld file to src/soc/amd/picasso/ and sets MEMLAYOUT_LD_FILE config variable to point to this newly added file. Unused elements from the memlayout.ld file are dropped and path to early_dram.ld is updated to include the one from src/arch/x86. BUG=b:155322763 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I59bf5f93b712407ddcc9fb8a46167936c6c28a76 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
46 lines
1.4 KiB
Plaintext
46 lines
1.4 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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#include <arch/header.ld>
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#define EARLY_MEMLAYOUT "src/arch/x86/early_ram.ld"
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SECTIONS
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{
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/*
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* It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively
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* like other architectures/chipsets it's not possible because of
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* the linking games played during romstage creation by trying
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* to find the final landing place in CBFS for XIP. Therefore,
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* conditionalize with macros.
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*/
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#if ENV_RAMSTAGE
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RAMSTAGE(CONFIG_RAMBASE, (CONFIG(RELOCATABLE_RAMSTAGE) ? 8M :
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CONFIG_RAMTOP - CONFIG_RAMBASE))
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#elif ENV_ROMSTAGE
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/* The 1M size is not allocated. It's just for basic size checking.
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* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
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ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
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#include EARLY_MEMLAYOUT
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#elif ENV_SEPARATE_VERSTAGE
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/* The 1M size is not allocated. It's just for basic size checking.
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* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
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VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M)
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#include EARLY_MEMLAYOUT
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#elif ENV_BOOTBLOCK
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BOOTBLOCK(CONFIG_X86_RESET_VECTOR - CONFIG_C_ENV_BOOTBLOCK_SIZE + 0x10,
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CONFIG_C_ENV_BOOTBLOCK_SIZE)
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#include EARLY_MEMLAYOUT
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#endif
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}
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#if ENV_BOOTBLOCK
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/* Bootblock specific scripts which provide more SECTION directives. */
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#include <cpu/x86/16bit/entry16.ld>
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#include <cpu/x86/16bit/reset16.ld>
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#endif /* ENV_BOOTBLOCK */
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