Model 6ex are Core Solo and Core Duo CPUs (yonah) that never existed with a LGA775 socket. This reduces the size of the microcode from 180k to 168k. Change-Id: Ic5b3d0e7c8009dab2dca477010c328274a818fed Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17120 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
19 lines
505 B
Makefile
19 lines
505 B
Makefile
subdirs-y += ../model_6fx
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subdirs-y += ../model_f3x
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subdirs-y += ../model_f4x
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#subdirs-y += ../model_f6x
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#subdirs-y += ../model_1066x
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subdirs-y += ../model_1067x
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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subdirs-y += ../../x86/smm
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subdirs-y += ../microcode
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subdirs-y += ../hyperthreading
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subdirs-y += ../speedstep
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cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
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romstage-y += ../car/romstage.c
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romstage-y += ../car/romstage.c
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