3c0bfaf7da
The intel/xe7501devkit is still broken, I think the (romcc) image is too big to fit in the bootblock if CONFIG_DEBUG_RAM_SETUP is enabled. It would make sense to convert all CPU_INTEL_SOCKET_MPGA604 to CAR, but I have no hardware to test. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
70 lines
1.4 KiB
C
70 lines
1.4 KiB
C
#include <console/console.h>
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#include <arch/io.h>
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#include <arch/romcc_io.h>
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#include <spd.h>
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#include "raminit.h"
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#include <spd.h>
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#include <console/console.h>
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#if CONFIG_DEBUG_RAM_SETUP
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void dump_spd_registers(void)
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{
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int i;
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printk(BIOS_DEBUG, "\n");
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for(i = 0; i < DIMM_SOCKETS; i++) {
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unsigned device;
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device = DIMM0 + i;
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if (device) {
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int j;
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printk(BIOS_DEBUG, "DIMM %d: %02x", i, device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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printk(BIOS_DEBUG, "\n%02x: ", j);
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}
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status = spd_read_byte(device, j);
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if (status < 0) {
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printk(BIOS_DEBUG, "bad device\n");
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break;
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}
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byte = status & 0xff;
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printk(BIOS_DEBUG, "%02x ", byte);
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}
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printk(BIOS_DEBUG, "\n");
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}
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}
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}
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static void print_debug_pci_dev(unsigned dev)
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{
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print_debug("PCI: ");
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print_debug_hex8((dev >> 16) & 0xff);
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print_debug_char(':');
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print_debug_hex8((dev >> 11) & 0x1f);
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print_debug_char('.');
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print_debug_hex8((dev >> 8) & 7);
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}
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void dump_pci_device(unsigned dev)
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{
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int i;
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print_debug_pci_dev(dev);
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print_debug("\n");
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for (i = 0; i <= 255; i++) {
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unsigned char val;
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if ((i & 0x0f) == 0) {
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print_debug_hex8(i);
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print_debug_char(':');
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}
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val = pci_read_config8(dev, i);
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print_debug_char(' ');
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print_debug_hex8(val);
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if ((i & 0x0f) == 0x0f) {
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print_debug("\n");
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}
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}
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}
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#endif
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