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3d62781acb3ab7d2496d73b2198bb7e7dcf496c6
system76-coreboot/src
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Matt DeVillier 3d62781acb drivers/i2c/hid: Use ACPI device name if provided by config 
Follow model of drivers/i2c/generic and use user-supplied device
name if specified in the chip config.

Change-Id: Ia783bac2797e239989c03a3421b9293a055db3d0
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47782
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22 22:22:06 +00:00
..
acpi
ACPI: Define acpi_get_preferred_pm_profile()
2020-11-19 22:58:41 +00:00
arch
ACPI S3: Split arch-agnostic parts
2020-11-19 22:58:11 +00:00
commonlib
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
console
console: Override uart base address
2020-11-09 07:46:10 +00:00
cpu
intel/socket_441: Increase bootblock size
2020-11-21 01:53:18 +00:00
device
device/pci: Add NULL check for PCI driver's .ops
2020-11-16 12:15:38 +00:00
drivers
drivers/i2c/hid: Use ACPI device name if provided by config
2020-11-22 22:22:06 +00:00
ec
ec/google/chromeec: Add more wrappers for regulator control
2020-11-18 06:13:12 +00:00
include
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
lib
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
mainboard
mb/kontron: Add Kontron mAL10 COMe module support
2020-11-22 22:18:22 +00:00
northbridge
nb/intel/sandybridge: Clean up COMPOFST1 logic
2020-11-22 22:14:03 +00:00
security
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
soc
soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T output
2020-11-22 22:17:53 +00:00
southbridge
sb/intel/lynxpoint/smbus.c: Remove invalid PCI IDs
2020-11-22 14:25:30 +00:00
superio
superio/smsc/sio1036: Support 16-bit IO port addressing
2020-11-18 13:12:11 +00:00
vendorcode
vc/amd/pi/00670F00: Add raw AGESA binary only to COREBOOT CBFS
2020-11-22 22:15:07 +00:00
Kconfig
soc/intel/xeon_sp: Move function debug macros
2020-10-29 16:44:19 +00:00