55189c9d33
Change-Id: I2858fdf74e782f425d56653491cdebe83c185d19 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41208 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
47 lines
1.5 KiB
C
47 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef NVRAMTOOL_CMOS_LOWLEVEL_H
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#define NVRAMTOOL_CMOS_LOWLEVEL_H
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#include "common.h"
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#include "layout.h"
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typedef struct {
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void (*init)(void* data);
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unsigned char (*read)(unsigned addr);
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void (*write)(unsigned addr, unsigned char value);
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void (*set_iopl)(int level);
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} cmos_access_t;
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typedef enum { HAL_CMOS, HAL_MEMORY } hal_t;
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void select_hal(hal_t hal, void *data);
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#define CMOS_AREA_OUT_OF_RANGE (CMOS_RESULT_START + 0)
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#define CMOS_AREA_OVERLAPS_RTC (CMOS_RESULT_START + 1)
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#define CMOS_AREA_TOO_WIDE (CMOS_RESULT_START + 2)
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unsigned long long cmos_read(const cmos_entry_t * e);
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void cmos_write(const cmos_entry_t * e, unsigned long long value);
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unsigned char cmos_read_byte(unsigned index);
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void cmos_write_byte(unsigned index, unsigned char value);
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void cmos_read_all(unsigned char data[]);
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void cmos_write_all(unsigned char data[]);
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void set_iopl(int level);
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int verify_cmos_op(unsigned bit, unsigned length, cmos_entry_config_t config);
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#define CMOS_SIZE 256 /* size of CMOS memory in bytes */
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#define CMOS_RTC_AREA_SIZE 14 /* first 14 bytes control real time clock */
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/****************************************************************************
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* verify_cmos_byte_index
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*
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* Return 1 if 'index' does NOT specify a valid CMOS memory location. Else
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* return 0.
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****************************************************************************/
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static inline int verify_cmos_byte_index(unsigned index)
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{
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return (index < CMOS_RTC_AREA_SIZE) || (index >= CMOS_SIZE);
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}
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#endif /* NVRAMTOOL_CMOS_LOWLEVEL_H */
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