3f5f6d8368
Commit "romcc: Don't fail on function prototypes" (11a7db3b) [1]
made romcc not choke on function prototypes anymore. This
allows us to get rid of a lot of ifdefs guarding __ROMCC__ .
[1] http://review.coreboot.org/2424
Change-Id: Ib1be3b294e5b49f5101f2e02ee1473809109c8ac
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3216
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
164 lines
4.3 KiB
C
164 lines
4.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SOUTHBRIDGE_VIA_VT8237R_VT8237R_H
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#define SOUTHBRIDGE_VIA_VT8237R_VT8237R_H
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/* Static resources for the VT8237R southbridge */
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#define VT8237R_APIC_ID 0x2
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#define VT8237R_ACPI_IO_BASE 0x500
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#define DEFAULT_PMBASE VT8237R_ACPI_IO_BASE
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#define VT8237R_SMBUS_IO_BASE 0x400
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/* 0x0 disabled, 0x2 reserved, 0xf = IRQ15 */
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#define VT8237R_ACPI_IRQ 0x9
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#if defined(__GNUC__)
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#define VT8237S_SPI_MEM_BASE 0xfed02000ULL
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#else
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#define VT8237S_SPI_MEM_BASE 0xfed02000UL
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#endif
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/* PMBASE FIXME mostly taken from ich7 */
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#define PM1_STS 0x00
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#define WAK_STS (1 << 15)
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#define PCIEXPWAK_STS (1 << 14)
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#define PRBTNOR_STS (1 << 11)
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#define RTC_STS (1 << 10)
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#define PWRBTN_STS (1 << 8)
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#define GBL_STS (1 << 5)
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#define BM_STS (1 << 4)
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#define TMROF_STS (1 << 0)
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#define PM1_EN 0x02
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#define PCIEXPWAK_DIS (1 << 14)
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#define RTC_EN (1 << 10)
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#define PWRBTN_EN (1 << 8)
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#define GBL_EN (1 << 5)
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#define TMROF_EN (1 << 0)
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#define PM1_CNT 0x04
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#define SLP_EN (1 << 13)
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#define SLP_TYP (7 << 10)
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#define GBL_RLS (1 << 2)
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#define BM_RLD (1 << 1)
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#define SCI_EN (1 << 0)
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#define PM1_TMR 0x08
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#define PROC_CNT 0x10
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#define LV2 0x14
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#define LV3 0x15
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#define SMI_STS 0x28
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#define SMI_EN 0x2d
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#define EOS (1 << 0)
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/* IDE */
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#define IDE_CS 0x40
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#define IDE_CONF_I 0x41
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#define IDE_CONF_II 0x42
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#define IDE_CONF_FIFO 0x43
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#define IDE_MISC_I 0x44
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#define IDE_MISC_II 0x45
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#define IDE_UDMA 0x50
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#define VT8237R_IDE0_80PIN_CABLE ((1UL<<28)|(1UL<<20))
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#define VT8237R_IDE1_80PIN_CABLE ((1UL<<12)|(1UL<< 4))
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#define VT8237R_IDE_CABLESEL_MASK (VT8237R_IDE0_80PIN_CABLE|VT8237R_IDE1_80PIN_CABLE)
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/* SMBus */
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#define VT8237R_PSON 0x82
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#define VT8237R_POWER_WELL 0x94
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#define VT8237R_SMBUS_IO_BASE_REG 0xd0
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#define VT8237R_SMBUS_HOST_CONF 0xd2
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#define SMBHSTSTAT (VT8237R_SMBUS_IO_BASE + 0x0)
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#define SMBSLVSTAT (VT8237R_SMBUS_IO_BASE + 0x1)
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#define SMBHSTCTL (VT8237R_SMBUS_IO_BASE + 0x2)
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#define SMBHSTCMD (VT8237R_SMBUS_IO_BASE + 0x3)
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#define SMBXMITADD (VT8237R_SMBUS_IO_BASE + 0x4)
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#define SMBHSTDAT0 (VT8237R_SMBUS_IO_BASE + 0x5)
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#define HOST_RESET 0xff
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/* 1 in the 0 bit of SMBHSTADD states to READ. */
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#define READ_CMD 0x01
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#define SMBUS_TIMEOUT (100 * 1000 * 10)
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#define I2C_TRANS_CMD 0x40
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#define CLOCK_SLAVE_ADDRESS 0x69
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#if CONFIG_DEBUG_SMBUS
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#define PRINT_DEBUG(x) print_debug(x)
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#define PRINT_DEBUG_HEX16(x) print_debug_hex16(x)
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#else
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#define PRINT_DEBUG(x)
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#define PRINT_DEBUG_HEX16(x)
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#endif
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#define SMBUS_DELAY() inb(0x80)
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struct vt8237_network_rom {
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u8 mac_address[6];
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u8 phy_addr;
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u8 res1;
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u16 sub_sid;
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u16 sub_vid;
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u16 pid;
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u16 vid;
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u8 pmcc;
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u8 data_sel;
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u8 pmu_data_reg;
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u8 aux_curr;
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u16 reserved;
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u8 min_gnt;
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u8 max_lat;
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u8 bcr0;
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u8 bcr1;
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u8 cfg_a;
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u8 cfg_b;
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u8 cfg_c;
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u8 cfg_d;
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u8 checksum;
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}
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#if defined(__GNUC__)
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__attribute__ ((packed))
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#endif
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;
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#define MAINBOARD_POWER_OFF 0
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#define MAINBOARD_POWER_ON 1
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#define MAINBOARD_POWER_KEEP 2
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#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
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#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
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#endif
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#ifdef __PRE_RAM__
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u8 smbus_read_byte(u8 dimm, u8 offset);
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void smbus_write_byte(u8 dimm, u8 offset, u8 data);
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void enable_smbus(void);
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void smbus_fixup(const struct mem_controller *ctrl);
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// these are in vt8237_early_smbus.c - do they really belong there?
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void vt8237_sb_enable_fid_vid(void);
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void enable_rom_decode(void);
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void vt8237_early_spi_init(void);
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int vt8237_early_network_init(struct vt8237_network_rom *rom);
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#else
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void writeback(device_t dev, u16 where, u8 what);
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void dump_south(device_t dev);
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u32 vt8237_ide_80pin_detect(device_t dev);
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#endif
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#endif
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