40a3e321d4
This includes Chrome OS downstream up to Change-Id: Ic89ed54c. Change-Id: I81853434600390d643160fe57554495b2bfe60ab Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10633 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
30 lines
879 B
C
30 lines
879 B
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <arch/io.h>
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#include <soc/addressmap.h>
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#include <soc/sdram.h>
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#include <soc/nvidia/tegra/apbmisc.h>
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uint32_t sdram_get_ram_code(void)
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{
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struct apbmisc *misc = (struct apbmisc *)TEGRA_APB_MISC_BASE;
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return (read32(&misc->pp_strapping_opt_a) &
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PP_STRAPPING_OPT_A_RAM_CODE_MASK) >>
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PP_STRAPPING_OPT_A_RAM_CODE_SHIFT;
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}
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