41a2c73b06
Change-Id: I9833c4f6c43b3e67f95bd465c42d7a5036dff914 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
38 lines
616 B
Plaintext
38 lines
616 B
Plaintext
config CPU_INTEL_MODEL_206AX
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bool
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if CPU_INTEL_MODEL_206AX
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select ARCH_ALL_STAGES_X86_32
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select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
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select MMX
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select SSE2
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select UDELAY_TSC
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select TSC_MONOTONIC_TIMER
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select SUPPORT_CPU_UCODE_IN_CBFS
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#select AP_IN_SIPI_WAIT
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select TSC_SYNC_MFENCE
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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config SMM_RESERVED_SIZE
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hex
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default 0x100000
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# Intel Enhanced Debug region must be 4MB
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config IED_REGION_SIZE
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hex
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default 0x400000
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config MAX_CPUS
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int
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default 8
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endif
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