41ce3a57d6
Add ACPI devices for these components so that generated LPI constraints for them have valid device references. TEST=tested with rest of patch train Change-Id: I3b85fec3de8f33d338425a417cc8b0f5290a5e4f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78520 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
86 lines
1.3 KiB
Plaintext
86 lines
1.3 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Intel Serial IO Devices */
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Device (I2C0)
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{
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Name (_ADR, 0x00150000)
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Name (_DDN, "Serial IO I2C Controller 0")
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}
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Device (I2C1)
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{
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Name (_ADR, 0x00150001)
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Name (_DDN, "Serial IO I2C Controller 1")
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}
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Device (I2C2)
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{
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Name (_ADR, 0x00150002)
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Name (_DDN, "Serial IO I2C Controller 2")
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}
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Device (I2C3)
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{
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Name (_ADR, 0x00150003)
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Name (_DDN, "Serial IO I2C Controller 3")
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}
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#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
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Device (I2C4)
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{
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Name (_ADR, 0x00190000)
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Name (_DDN, "Serial IO I2C Controller 4")
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}
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Device (I2C5)
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{
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Name (_ADR, 0x00190001)
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Name (_DDN, "Serial IO I2C Controller 5")
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}
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#endif
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Device (SPI0)
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{
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Name (_ADR, 0x001e0002)
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Name (_DDN, "Serial IO SPI Controller 0")
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}
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Device (SPI1)
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{
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Name (_ADR, 0x001e0003)
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Name (_DDN, "Serial IO SPI Controller 1")
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}
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Device (SPI2)
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{
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Name (_ADR, 0x00120006)
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Name (_DDN, "Serial IO SPI Controller 2")
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}
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Device (UAR0)
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{
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Name (_ADR, 0x001e0000)
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Name (_DDN, "Serial IO UART Controller 0")
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}
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Device (UAR1)
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{
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Name (_ADR, 0x001e0001)
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Name (_DDN, "Serial IO UART Controller 1")
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}
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#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
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Device (UAR2)
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{
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Name (_ADR, 0x00190002)
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Name (_DDN, "Serial IO UART Controller 2")
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}
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#endif
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Device (FSPI)
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{
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Name (_ADR, 0x001f0005)
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Name (_DDN, "Fast SPI")
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}
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