If bit 7 of a PIRQ route is set, it is disabled. Modern OSes don't use PIRQ routing, so we might as well zero the other bits for consistency. Tested on Asrock B85M Pro4 with SeaBIOS 1.13.0, still boots. Change-Id: I78980b9ea5e878a6200df0f6c18c5e7d06a7950a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43861 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
125 lines
3.4 KiB
Plaintext
125 lines
3.4 KiB
Plaintext
chip soc/intel/broadwell
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# Disable eDP Hotplug
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register "gpu_dp_d_hotplug" = "0x00"
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# Enable DisplayPort C Hotplug with 6ms pulse
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register "gpu_dp_c_hotplug" = "0x06"
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# Enable HDMI Hotplug with 6ms pulse
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register "gpu_dp_b_hotplug" = "0x06"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x80"
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# SuperIO range is 0x700-0x73f
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register "gen2_dec" = "0x003c0701"
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register "alt_gp_smi_en" = "0x0000"
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register "gpe0_en_1" = "0x00000000"
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register "gpe0_en_2" = "0x00000000"
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register "gpe0_en_3" = "0x00000000"
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register "gpe0_en_4" = "0x00000000"
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register "sata_port_map" = "0x1"
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register "sata_devslp_disable" = "0x1"
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# Force enable ASPM for PCIe Port 4
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register "pcie_port_force_aspm" = "0x10"
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# Enable port coalescing
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register "pcie_port_coalesce" = "1"
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# Disable PCIe CLKOUT 1,5 and CLKOUT_XDP
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register "icc_clock_disable" = "0x01220000"
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device cpu_cluster 0 on
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device lapic 0 on end
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end
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 02.0 on end # vga controller
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device pci 03.0 on end # mini-hd audio
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device pci 13.0 off end # Smart Sound Audio DSP
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device pci 14.0 on end # USB3 XHCI
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device pci 15.0 off end # Serial I/O DMA
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device pci 15.1 off end # I2C0
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device pci 15.2 off end # I2C1
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device pci 15.3 off end # GSPI0
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device pci 15.4 off end # GSPI1
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device pci 15.5 off end # UART0
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device pci 15.6 off end # UART1
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT
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device pci 17.0 off end # SDIO
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device pci 19.0 off end # GbE
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device pci 1b.0 on end # High Definition Audio
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device pci 1c.0 off end # PCIe Port #1
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device pci 1c.1 off end # PCIe Port #2
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device pci 1c.2 on end # PCIe Port #3
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device pci 1c.3 on end # PCIe Port #4
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device pci 1c.4 on end # PCIe Port #5
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device pci 1c.5 off end # PCIe Port #6
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device pci 1d.0 on end # USB2 EHCI
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device pci 1e.0 off end # PCI bridge
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device pci 1f.0 on
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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chip superio/ite/it8772f
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# Skip keyboard init
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register "skip_keyboard" = "1"
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# Enable PECI on TMPIN3
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register "peci_tmpin" = "3"
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# Disable use of TMPIN1
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register "tmpin1_mode" = "0"
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# Enable Thermal Diode on TMPIN2
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register "tmpin2_mode" = "1"
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# Enable FAN2
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register "fan2_enable" = "1"
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# Default FAN2 speed
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register "fan2_speed" = "0x4d"
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device pnp 2e.0 off end # FDC
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device pnp 2e.1 on # Serial Port 1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.4 on # Environment Controller
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io 0x60 = 0x700
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io 0x62 = 0x710
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irq 0x70 = 0x09
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irq 0xf2 = 0x20
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irq 0xf4 = 0x0
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irq 0xfa = 0x12
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end
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device pnp 2e.7 on # GPIO
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io 0x60 = 0x720
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io 0x62 = 0x730
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end
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device pnp 2e.5 off
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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end # Keyboard
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device pnp 2e.6 off
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irq 0x70 = 12
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end # Mouse
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device pnp 2e.a off end # IR
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end
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end # LPC bridge
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device pci 1f.2 on end # SATA Controller
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device pci 1f.3 on end # SMBus
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device pci 1f.6 on end # Thermal
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end
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end
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