David Hendricks c01d138013 exynos5250: Add function for configuring L2 cache ...

This adds a new function to configure L2 cache for the
exynos5250 and deprecates the old function.

Change-Id: I9562f3301aa1e2911dae3856ab57bb6beec2e224
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2949
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: build bot (Jenkins)

2013-03-29 22:24:31 +01:00

..

amd

x86: unify amd and non-amd MTRR routines

2013-03-22 04:06:42 +01:00

armltd

ARMV7: minor tweaks to inter-stage calling and payload handling.

2013-02-20 20:49:16 +01:00

intel

haswell: Add microcode for ULT C0 stepping 0x40651

2013-03-22 00:17:00 +01:00

samsung

exynos5250: Add function for configuring L2 cache

2013-03-29 22:24:31 +01:00

via

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

2013-03-01 10:16:08 +01:00

x86

x86: mtrr: optimize hole carving above 4GiB

2013-03-29 20:12:20 +01:00

Kconfig

Fix microcode selection code

2013-02-27 21:01:53 +01:00

Makefile.inc

Fix microcode selection code

2013-02-27 21:01:53 +01:00