c58e3bd90a
Add a new post code POST_VIDEO_FAILURE used when the Intel FSP silicon initialization returns an error when graphics was also initialized. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms Change-Id: Ibc7f7defbed34038f445949010a37c8e368aae20 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32775 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
32 lines
1.1 KiB
Plaintext
32 lines
1.1 KiB
Plaintext
-------------------------------------------------------------------------------
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coreboot POST Codes
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-------------------------------------------------------------------------------
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This is an (incomplete) list of POST codes emitted by coreboot v4.
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0x10 Entry into protected mode
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0x01 Entry into 'crt0.s' reset code jumps to here
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0x11 Start copying coreboot to RAM with decompression if compressed
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0x12 Copy/decompression finished jumping to RAM
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0x80 Entry into coreboot in RAM
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0x13 Entry into c_start
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0xfe Pre call to hardwaremain()
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0x39 Console is initialized
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0x40 Console boot message succeeded
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0x66 Devices have been enumerated
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0x88 Devices have been configured
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0x89 Devices have been enabled
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0xe0 Boot media (e.g. SPI ROM) is corrupt
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0xe1 Resource stored within CBFS is corrupt
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0xe2 Vendor binary (e.g. FSP) generated a fatal error
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0xe3 RAM could not be initialized
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0xe4 Critical hardware component could not initialize
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0xe5 Video subsystem failed to initialize
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0xf8 Entry into elf boot
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0xf3 Jumping to payload
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Errors (used in several places):
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0xee Not supposed to get here
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0xff Elfload fail or die() called
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