Files
system76-coreboot/src/mainboard/facebook/fbg1701/hda_verb.c
Frans Hendriks 43b6e2ed71 mainboard/facebook/fbg1701: Do initial mainboard commit
Initial support for Facebook FBG-1701 system.
coreboot implementation based on Intel Strago mainboard.

Configure 'Onboard memory manufacturer' which must match HW.

BUG=N/A
TEST=booting SeaBIOS and Linux 4.15+ kernel on Facebook FBG-1701

Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-06-05 13:03:43 +00:00

79 lines
2.0 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018 Eltan B.V.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
/* coreboot specific header */
0x10EC0298, /* Codec Vendor - Device ID: Realtek ALC298 */
0x152D1165, /* Subsystem ID Quanta */
0x0000000C, /* Number of jacks */
/* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0x0, 0x152D1165),
/* Pin Widget Verb Table */
/* Widget node 1 (NID 0x01) */
0x0017FF00,
0x0017FF00,
0x0017FF00,
0x0017FF00,
/* Pin Complex (NID 0x12) DMIC */
AZALIA_PIN_CFG(0x0, 0x12, 0x90A60130),
/* Pin Complex (NID 0x13) DMIC */
AZALIA_PIN_CFG(0x0, 0x13, 0x411111F0),
/* Pin Complex (NID 0x14) SPEAKER-OUT (Port-D) */
AZALIA_PIN_CFG(0x0, 0x14, 0x90180110),
/* Pin Complex (NID 0x17) I2S-OUT */
AZALIA_PIN_CFG(0x0, 0x17, 0x01011120),
/* Pin Complex (NID 0x18) MIC1 (Port-B) */
AZALIA_PIN_CFG(0x0, 0x18, 0x41111F0),
/* Pin Complex (NID 0x19) I2S-IN */
AZALIA_PIN_CFG(0x0, 0x19, 0x90870140),
/* Pin Complex (NID 0x1A) LINE1 (Port-C) */
AZALIA_PIN_CFG(0x0, 0x1A, 0x411111F0),
/* Pin Complex (NID 0x1D) PC-BEEP */
AZALIA_PIN_CFG(0x0, 0x1D, 0x40400001),
/* Pin Complex (NID 0x1E) SPDIF-OUT */
AZALIA_PIN_CFG(0x0, 0x1E, 0x411111F0),
/* Pin Complex (NID 0x1F) SPDIF-IN */
AZALIA_PIN_CFG(0x0, 0x1F, 0x411111F0),
/* Pin Complex (NID 0x21) HP-OUT (Port-A) */
AZALIA_PIN_CFG(0x0, 0x21, 0x411111F0),
/* POST I2S bypass output SRC */
0x0205002D,
0x0204C020,
0x0205002D,
0x0204C020,
};
const u32 pc_beep_verbs[0] = {};
AZALIA_ARRAY_SIZES;