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Frans Hendriks 43fc38943d mainboard/intel/strago/acpi: Serialize _CRS method 
IASL reports warning 'Control Method should be made Serialized'.
Change _CRS method to Serialized.

BUG=N/A
TEST=Build Intel Strago

Change-Id: I63a7e1caab19360a9a5831458311d5a83fdf52d1
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-06 10:26:11 +00:00
..
acpi
arch/x86: Add common AMD ACPI hardware definitions
2017-11-10 19:15:38 +00:00
arch
arch/x86/acpi: Update VT-d DMA remapping structure flags setting
2019-05-01 18:33:55 +00:00
commonlib
src: include <assert.h> when appropriate
2019-04-23 10:01:36 +00:00
console
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
2019-03-08 08:33:24 +00:00
cpu
cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZE
2019-04-25 15:56:28 +00:00
device
x86emu: add console.h header to fix compilation
2019-05-02 05:00:33 +00:00
drivers
drivers/fsp 1.1: clean up Kconfig options
2019-05-03 20:15:29 +00:00
ec
ec/google/wilco: Support board_id with EC provided ID
2019-04-18 23:43:06 +00:00
include
lib/fmap: Add area read/write functions
2019-04-23 10:22:54 +00:00
lib
vboot: refactor OPROM code
2019-04-30 21:47:25 +00:00
mainboard
mainboard/intel/strago/acpi: Serialize _CRS method
2019-05-06 10:26:11 +00:00
northbridge
nb/intel/haswell: correct a typo in Kconfig
2019-05-03 14:32:06 +00:00
security
vboot: refactor OPROM code
2019-04-30 21:47:25 +00:00
soc
{soc, southbridge} : Correct typo in comment
2019-05-03 22:39:14 +00:00
southbridge
{soc, southbridge} : Correct typo in comment
2019-05-03 22:39:14 +00:00
superio
superio/fintek/f71808a: Add more optional ramstage registers
2019-05-01 00:09:57 +00:00
vendorcode
coreboot: Run mainboard specific code before Cr50 reset
2019-04-23 10:21:24 +00:00
Kconfig
src/Kconfig: remove duplicate entry for drivers/fsp1_0/Kconfig
2019-05-04 20:12:44 +00:00