44985ae757
The code under `cpu/x86/tsc` is only compiled in when its `Makefile.inc` is included from platform (CPU/SoC) code and the `UDELAY_TSC` Kconfig option is enabled. Include `cpu/x86/tsc/Makefile.inc` once from `cpu/x86/Makefile.inc` and drop the now-redundant inclusions from platform code. Also, deduplicate the `UDELAY_TSC` guards. Change-Id: I41e96026f37f19de954fd5985b92a08cb97876c1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57456 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
19 lines
486 B
Makefile
19 lines
486 B
Makefile
## SPDX-License-Identifier: GPL-2.0-or-later
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ramstage-y += slot_1.c
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ramstage-y += l2_cache.c
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subdirs-y += ../model_6xx
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subdirs-y += ../model_65x
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subdirs-y += ../model_67x
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subdirs-y += ../model_68x
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subdirs-y += ../model_6bx
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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subdirs-y += ../microcode
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bootblock-y += ../car/p3/cache_as_ram.S
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bootblock-y += ../car/bootblock.c
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postcar-y += ../car/p4-netburst/exit_car.S
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romstage-y += ../car/romstage.c
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