d3043313a9
We should not be #include .c files, instead link early_serial into romstage and provide a prototype. Change-Id: Ia9277169ce1592e1fc72f8849f0982741daec567 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5416 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Pre-RAM driver for the Fintek F81865F/FG Super I/O chip. */
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#include <arch/io.h>
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#include <device/pnp.h>
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#include "f81865f.h"
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static void pnp_enter_conf_state(device_t dev)
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{
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u16 port = dev >> 8;
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outb(0x87, port);
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outb(0x87, port);
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}
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static void pnp_exit_conf_state(device_t dev)
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{
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u16 port = dev >> 8;
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outb(0xaa, port);
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}
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void f81865f_enable_serial(device_t dev, u16 iobase)
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{
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pnp_enter_conf_state(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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pnp_exit_conf_state(dev);
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}
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