45e4ab4a66
Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree. Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping. Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
31 lines
613 B
C
31 lines
613 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/pci_ops.h>
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#include <southbridge/intel/common/pmbase.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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void mainboard_pch_lpc_setup(void)
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{
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u16 reg16;
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reg16 = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0xa4);
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reg16 |= (1 << 13); // WOL Enable Override (WOL_EN_OVRD)
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pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xa4, reg16);
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}
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const struct southbridge_usb_port mainboard_usb_ports[] = {
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{1, 0, 0},
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{1, 0, 0},
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{1, 0, 1},
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{1, 0, 1},
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{1, 0, 2},
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{1, 0, 2},
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{1, 0, 3},
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{1, 0, 3},
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{1, 0, 4},
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{1, 0, 4},
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{1, 0, 6},
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{1, 0, 5},
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{1, 0, 5},
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{1, 0, 6},
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};
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