46514c2b87
This change defines a Kconfig variable MEMLAYOUT_LD_FILE which allows SoC/mainboard to provide a linker file for the platform. x86 already provides a default memlayout.ld under src/arch/x86. With this new Kconfig variable, it is possible for the SoC/mainboard code for x86 to provide a custom linker file as well. Makefile.inc is updated for all architectures to use this new Kconfig variable instead of assuming memlayout.ld files under a certain path. All non-x86 boards used memlayout.ld under mainboard directory. However, a lot of these boards were simply including the memlayout from SoC. So, this change also updates these mainboards and SoCs to define the Kconfig as required. BUG=b:155322763 TEST=Verified that abuild with --timeless option results in the same coreboot.rom image for all boards. Change-Id: I6a7f96643ed0519c93967ea2c3bcd881a5d6a4d6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42292 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
76 lines
1.8 KiB
Plaintext
76 lines
1.8 KiB
Plaintext
## SPDX-License-Identifier: GPL-2.0-only
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# To execute, do:
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# util/riscv/make-spike-elf.sh build/coreboot.rom build/coreboot.elf
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# qemu-system-riscv64 -M virt -m 1024M -nographic -kernel build/coreboot.elf
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if BOARD_EMULATION_QEMU_RISCV_RV64
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config BOARD_EMULATION_QEMU_RISCV
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def_bool y
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select ARCH_RISCV_RV64
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endif
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if BOARD_EMULATION_QEMU_RISCV_RV32
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config BOARD_EMULATION_QEMU_RISCV
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def_bool y
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select ARCH_RISCV_RV32
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endif
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if BOARD_EMULATION_QEMU_RISCV
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select SOC_UCB_RISCV
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select BOARD_ROMSIZE_KB_4096
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select BOOT_DEVICE_NOT_SPI_FLASH
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select MISSING_BOARD_RESET
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select DRIVERS_UART_8250MEM
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select RISCV_HAS_OPENSBI
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config MEMLAYOUT_LD_FILE
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string
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default "src/mainboard/emulation/qemu-riscv/memlayout.ld"
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config MAINBOARD_DIR
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string
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default "emulation/qemu-riscv"
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config MAINBOARD_PART_NUMBER
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string
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default "QEMU RISCV"
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config MAX_CPUS
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int
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default 1
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config DRAM_SIZE_MB
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int
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default 32768
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config OPENSBI_PLATFORM
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string
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default "qemu/virt"
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# ugly, but CBFS is placed in DRAM...
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config OPENSBI_TEXT_START
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hex
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default 0x80010000 if COREBOOT_ROMSIZE_KB_64
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default 0x80020000 if COREBOOT_ROMSIZE_KB_128
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default 0x80040000 if COREBOOT_ROMSIZE_KB_256
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default 0x80080000 if COREBOOT_ROMSIZE_KB_512
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default 0x80100000 if COREBOOT_ROMSIZE_KB_1024
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default 0x80200000 if COREBOOT_ROMSIZE_KB_2048
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default 0x80400000 if COREBOOT_ROMSIZE_KB_4096
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default 0x80600000 if COREBOOT_ROMSIZE_KB_6144
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default 0x80800000 if COREBOOT_ROMSIZE_KB_8192
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default 0x80a00000 if COREBOOT_ROMSIZE_KB_10240
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default 0x80c00000 if COREBOOT_ROMSIZE_KB_12288
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default 0x81000000 if COREBOOT_ROMSIZE_KB_16384
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default 0x82000000 if COREBOOT_ROMSIZE_KB_32768
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default 0x84000000 if COREBOOT_ROMSIZE_KB_65536
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endif # BOARD_EMULATION_QEMU_RISCV
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