46514c2b87
This change defines a Kconfig variable MEMLAYOUT_LD_FILE which allows SoC/mainboard to provide a linker file for the platform. x86 already provides a default memlayout.ld under src/arch/x86. With this new Kconfig variable, it is possible for the SoC/mainboard code for x86 to provide a custom linker file as well. Makefile.inc is updated for all architectures to use this new Kconfig variable instead of assuming memlayout.ld files under a certain path. All non-x86 boards used memlayout.ld under mainboard directory. However, a lot of these boards were simply including the memlayout from SoC. So, this change also updates these mainboards and SoCs to define the Kconfig as required. BUG=b:155322763 TEST=Verified that abuild with --timeless option results in the same coreboot.rom image for all boards. Change-Id: I6a7f96643ed0519c93967ea2c3bcd881a5d6a4d6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42292 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
64 lines
1.8 KiB
Plaintext
64 lines
1.8 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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#include <arch/header.ld>
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/* SYSTEM_IMEM : 0x14680000 - 0x146C0000 */
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#define SSRAM_START(addr) SYMBOL(ssram, addr)
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#define SSRAM_END(addr) SYMBOL(essram, addr)
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/* BOOT_IMEM : 0x14800000 - 0x14980000 */
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#define BSRAM_START(addr) SYMBOL(bsram, addr)
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#define BSRAM_END(addr) SYMBOL(ebsram, addr)
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/* AOP : 0x0B000000 - 0x0B100000 */
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#define AOPSRAM_START(addr) SYMBOL(aopsram, addr)
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#define AOPSRAM_END(addr) SYMBOL(eaopsram, addr)
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/* AOPMSG : 0x0C300000 - 0x0C400000 */
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#define AOPMSG_START(addr) SYMBOL(aopmsg, addr)
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#define AOPMSG_END(addr) SYMBOL(eaopmsg, addr)
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SECTIONS
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{
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AOPSRAM_START(0x0B000000)
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REGION(aop, 0x0B000000, 0x100000, 4096)
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AOPSRAM_END(0x0B100000)
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AOPMSG_START(0x0C300000)
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REGION(aop_ss_msg_ram_drv15, 0x0C3F0000, 0x400, 0x100)
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AOPMSG_END(0x0C400000)
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SSRAM_START(0x14680000)
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OVERLAP_VERSTAGE_ROMSTAGE(0x14680000, 100K)
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DMA_COHERENT(0x14699000, 8K)
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REGION(qcsdi, 0x146AC000, 44K, 4K)
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SSRAM_END(0x146C0000)
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BSRAM_START(0x14800000)
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REGION(fw_reserved2, 0x14800000, 0x16000, 0x1000)
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BOOTBLOCK(0x14816000, 40K)
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TTB(0x14820000, 56K)
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VBOOT2_WORK(0x1482E000, 12K)
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STACK(0x14832000, 16K)
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TIMESTAMP(0x14836000, 1K)
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PRERAM_CBMEM_CONSOLE(0x14836400, 32K)
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PRERAM_CBFS_CACHE(0x1483E400, 70K)
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FMAP_CACHE(0x1484FC00, 2K)
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REGION(bsram_unused, 0x14850400, 0x9DB00, 0x100)
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REGION(ddr_information, 0x148EDF00, 256, 256)
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REGION(limits_cfg, 0x148EE000, 4K, 4K)
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REGION(qclib_serial_log, 0x148EF000, 4K, 4K)
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REGION(ddr_training, 0x148F0000, 8K, 4K)
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REGION(qclib, 0x148F2000, 512K, 4K)
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REGION(dcb, 0x14972000, 16K, 4K)
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REGION(pmic, 0x14976000, 40K, 4K)
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BSRAM_END(0x14980000)
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DRAM_START(0x80000000)
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/* Various hardware/software subsystems make use of this area */
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REGION(dram_reserved, 0x85000000, 0x1A800000, 0x1000)
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POSTRAM_CBFS_CACHE(0x9F800000, 384K)
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RAMSTAGE(0x9F860000, 2M)
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}
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