4668ba77ea
The apollolake and skylake had duplicate stanzas of code for initializing the i2c buses. Additionally, they also had very similar structures for providing settings for the i2c speed control. Introduce a new struct lpss_i2c_bus_config and utilize it in both apollolake and skylake thereby removing the need for SoC-specific structres. The new structure is used for initializing a bus fully as the lpss i2c API is simplified in that lpss_i2c_init() is only required to be called. The struct lpss_i2c_bus_config structure is passed in for both initializing and filling in the SSDT information. The formerly exposed functions are made static to reduce the external API exposure. BUG=chrome-os-partner:58889 Change-Id: Ib4fa8a7a4de052da75c778a7658741a5a8e0e6b9 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17348 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
115 lines
2.8 KiB
C
115 lines
2.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2016 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi_device.h>
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#include <arch/acpigen.h>
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#include <device/device.h>
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#include <device/i2c.h>
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#include <device/pci.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <soc/i2c.h>
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#include <soc/intel/common/lpss_i2c.h>
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#include <soc/pci_devs.h>
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#include <soc/pci_ids.h>
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#include "chip.h"
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uintptr_t lpss_i2c_base_address(unsigned bus)
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{
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unsigned devfn;
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struct device *dev;
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struct resource *res;
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/* bus -> devfn */
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devfn = i2c_bus_to_devfn(bus);
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if (devfn >= 0) {
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/* devfn -> dev */
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dev = dev_find_slot(0, devfn);
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if (dev) {
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/* dev -> bar0 */
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res)
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return res->base;
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}
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}
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return (uintptr_t)NULL;
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}
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static int i2c_dev_to_bus(struct device *dev)
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{
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return i2c_devfn_to_bus(dev->path.pci.devfn);
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}
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/*
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* The device should already be enabled and out of reset,
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* either from early init in coreboot or FSP-S.
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*/
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static void i2c_dev_init(struct device *dev)
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{
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struct soc_intel_apollolake_config *config = dev->chip_info;
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int bus = i2c_dev_to_bus(dev);
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if (!config || bus < 0)
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return;
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lpss_i2c_init(bus, &config->i2c[bus]);
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}
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static void i2c_fill_ssdt(struct device *dev)
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{
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struct soc_intel_apollolake_config *config = dev->chip_info;
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int bus = i2c_dev_to_bus(dev);
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if (!config || bus < 0)
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return;
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acpigen_write_scope(acpi_device_path(dev));
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lpss_i2c_acpi_fill_ssdt(&config->i2c[bus]);
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acpigen_pop_len();
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}
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static struct i2c_bus_operations i2c_bus_ops = {
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.dev_to_bus = &i2c_dev_to_bus,
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};
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static struct device_operations i2c_dev_ops = {
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.read_resources = &pci_dev_read_resources,
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.set_resources = &pci_dev_set_resources,
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.enable_resources = &pci_dev_enable_resources,
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.scan_bus = &scan_smbus,
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.ops_i2c_bus = &i2c_bus_ops,
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.init = &i2c_dev_init,
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.acpi_fill_ssdt_generator = &i2c_fill_ssdt,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_APOLLOLAKE_I2C0,
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PCI_DEVICE_ID_APOLLOLAKE_I2C1,
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PCI_DEVICE_ID_APOLLOLAKE_I2C2,
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PCI_DEVICE_ID_APOLLOLAKE_I2C3,
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PCI_DEVICE_ID_APOLLOLAKE_I2C4,
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PCI_DEVICE_ID_APOLLOLAKE_I2C5,
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PCI_DEVICE_ID_APOLLOLAKE_I2C6,
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PCI_DEVICE_ID_APOLLOLAKE_I2C7,
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0,
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};
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static const struct pci_driver pch_i2c __pci_driver = {
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.ops = &i2c_dev_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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