Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
		
			
				
	
	
		
			184 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			184 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *
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|  * Copyright (C) 2014 Rockchip Electronics
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation; version 2 of the License.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  */
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| 
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| 
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| #include <usb/usb.h>
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| #include "generic_hub.h"
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| #include "dwc2_private.h"
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| #include "dwc2.h"
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| 
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| static int
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| dwc2_rh_port_status_changed(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	int changed;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	changed = hprt.prtconndet;
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| 
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| 	/* Clear connect detect flag */
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| 	if (changed) {
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| 		hprt.d32 &= HPRT_W1C_MASK;
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| 		hprt.prtconndet = 1;
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| 		writel(hprt.d32, dwc2->hprt0);
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| 	}
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| 	return changed;
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| }
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| 
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| static int
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| dwc2_rh_port_connected(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	return hprt.prtconnsts;
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| }
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| 
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| static int
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| dwc2_rh_port_in_reset(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	return hprt.prtrst;
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| }
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| 
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| static int
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| dwc2_rh_port_enabled(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	return hprt.prtena;
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| }
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| 
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| static usb_speed
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| dwc2_rh_port_speed(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	if (hprt.prtena) {
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| 		switch (hprt.prtspd) {
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| 		case PRTSPD_HIGH:
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| 			return HIGH_SPEED;
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| 		case PRTSPD_FULL:
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| 			return FULL_SPEED;
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| 		case PRTSPD_LOW:
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| 			return LOW_SPEED;
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| 		}
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| 	}
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| 	return -1;
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| }
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| 
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| static int
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| dwc2_rh_reset_port(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	hprt.d32 &= HPRT_W1C_MASK;
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| 	hprt.prtrst = 1;
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| 	writel(hprt.d32, dwc2->hprt0);
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| 
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| 	/* Wait a bit while reset is active. */
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| 	mdelay(50);
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| 
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| 	/* Deassert reset. */
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| 	hprt.prtrst = 0;
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| 	writel(hprt.d32, dwc2->hprt0);
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| 
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| 	/*
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| 	 * If reset and speed enum success the DWC2 core will set enable bit
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| 	 * after port reset bit is deasserted
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| 	 */
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| 	mdelay(1);
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	usb_debug("%s reset port ok, hprt = 0x%08x\n", __func__, hprt.d32);
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| 
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| 	if (!hprt.prtena) {
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| 		usb_debug("%s enable port fail! hprt = 0x%08x\n",
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| 			  __func__, hprt.d32);
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| 		return -1;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int
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| dwc2_rh_enable_port(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	/* Power on the port */
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	hprt.d32 &= HPRT_W1C_MASK;
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| 	hprt.prtpwr = 1;
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| 	writel(hprt.d32, dwc2->hprt0);
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| 	return 0;
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| }
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| 
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| static int
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| dwc2_rh_disable_port(usbdev_t *const dev, const int port)
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| {
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| 	hprt_t hprt;
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	hprt.d32 = readl(dwc2->hprt0);
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| 	hprt.d32 &= HPRT_W1C_MASK;
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| 	/* Disable the port*/
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| 	hprt.prtena = 1;
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| 	/* Power off the port */
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| 	hprt.prtpwr = 0;
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| 	writel(hprt.d32, dwc2->hprt0);
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| 	return 0;
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| }
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| 
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| static const generic_hub_ops_t dwc2_rh_ops = {
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| 	.hub_status_changed	= NULL,
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| 	.port_status_changed	= dwc2_rh_port_status_changed,
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| 	.port_connected		= dwc2_rh_port_connected,
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| 	.port_in_reset		= dwc2_rh_port_in_reset,
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| 	.port_enabled		= dwc2_rh_port_enabled,
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| 	.port_speed		= dwc2_rh_port_speed,
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| 	.enable_port		= dwc2_rh_enable_port,
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| 	.disable_port		= dwc2_rh_disable_port,
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| 	.start_port_reset	= NULL,
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| 	.reset_port		= dwc2_rh_reset_port,
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| };
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| 
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| void
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| dwc2_rh_init(usbdev_t *dev)
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| {
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| 	dwc_ctrl_t *const dwc2 = DWC2_INST(dev->controller);
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| 
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| 	/* we can set them here because a root hub _really_ shouldn't
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| 	   appear elsewhere */
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| 	dev->address = 0;
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| 	dev->hub = -1;
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| 	dev->port = -1;
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| 
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| 	generic_hub_init(dev, 1, &dwc2_rh_ops);
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| 	usb_debug("dwc2_rh_init HPRT 0x%08x p = %p\n ",
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| 		  readl(dwc2->hprt0), dwc2->hprt0);
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| 	usb_debug("DWC2: root hub init done\n");
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| }
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