47657ea1e1
This patch enables the Fan thermal participant device in the device tree for thermal active cooling action for DPTF on SKL-U fan based kunimitsu board. This patch defines the _ART table in dptf ASL file. With active cooling policy (_ART), we can control the fan on/off and speed. BRANCH=None BUG=chrome-os-partner:46493 TEST=Built for kunimitsu board. Tested to see that the thermal devices and the participants are enumerated and can be seen in the /sys/bus/platform/devices. Also, checked the FAN type the cooling devices enumerated in the /sys/class/thermal with sysfs interface. Change-Id: I40c540dad32beefe249f025b570c347d3ad08c36 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 82ae11643ca23e65780006f3890f1d173363b8af Original-Change-Id: If44b358052a677d13c74919f09a3eb89611fccad Original-Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/307028 Original-Commit-Ready: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Original-Tested-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Original-Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/12323 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
130 lines
3.9 KiB
Plaintext
130 lines
3.9 KiB
Plaintext
/*
|
|
* This file is part of the coreboot project.
|
|
*
|
|
* Copyright (C) 2014 Google Inc.
|
|
* Copyright (C) 2015 Intel Corporation.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; version 2 of the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#define DPTF_CPU_PASSIVE 80
|
|
#define DPTF_CPU_CRITICAL 90
|
|
#define DPTF_CPU_ACTIVE_AC0 90
|
|
#define DPTF_CPU_ACTIVE_AC1 80
|
|
#define DPTF_CPU_ACTIVE_AC2 70
|
|
#define DPTF_CPU_ACTIVE_AC3 60
|
|
#define DPTF_CPU_ACTIVE_AC4 50
|
|
|
|
#define DPTF_TSR0_SENSOR_ID 0
|
|
#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal"
|
|
#define DPTF_TSR0_PASSIVE 48
|
|
#define DPTF_TSR0_CRITICAL 70
|
|
|
|
#define DPTF_TSR1_SENSOR_ID 1
|
|
#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top"
|
|
#define DPTF_TSR1_PASSIVE 60
|
|
#define DPTF_TSR1_CRITICAL 70
|
|
|
|
#define DPTF_TSR2_SENSOR_ID 2
|
|
#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom"
|
|
#define DPTF_TSR2_PASSIVE 55
|
|
#define DPTF_TSR2_CRITICAL 70
|
|
|
|
#define DPTF_ENABLE_CHARGER
|
|
#define DPTF_ENABLE_FAN_CONTROL
|
|
|
|
/* Charger performance states, board-specific values from charger and EC */
|
|
Name (CHPS, Package () {
|
|
Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */
|
|
Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */
|
|
Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */
|
|
Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */
|
|
Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */
|
|
})
|
|
|
|
#ifdef DPTF_ENABLE_FAN_CONTROL
|
|
/* DFPS: Fan Performance States */
|
|
Name (DFPS, Package () {
|
|
0, // Revision
|
|
/*
|
|
* TODO : Need to update this Table after characterization.
|
|
* These are initial reference values.
|
|
*/
|
|
/* Control, Trip Point, Speed, NoiseLevel, Power */
|
|
Package () {100, 0xFFFFFFFF, 4986, 220, 2200},
|
|
Package () {90, 0xFFFFFFFF, 4804, 180, 1800},
|
|
Package () {80, 0xFFFFFFFF, 4512, 145, 1450},
|
|
Package () {70, 0xFFFFFFFF, 4204, 115, 1150},
|
|
Package () {60, 0xFFFFFFFF, 3838, 90, 900},
|
|
Package () {50, 0xFFFFFFFF, 3402, 65, 650},
|
|
Package () {40, 0xFFFFFFFF, 2904, 45, 450},
|
|
Package () {30, 0xFFFFFFFF, 2337, 30, 300},
|
|
Package () {20, 0xFFFFFFFF, 1608, 15, 150},
|
|
Package () {10, 0xFFFFFFFF, 800, 10, 100},
|
|
Package () {0, 0xFFFFFFFF, 0, 0, 50}
|
|
})
|
|
|
|
Name (DART, Package () {
|
|
/* Fan effect on CPU */
|
|
0, // Revision
|
|
Package () {
|
|
/*
|
|
* Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
|
|
* AC7, AC8, AC9
|
|
*/
|
|
\_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 100, 90, 80, 70, 60, 0, 0,
|
|
0, 0, 0
|
|
}
|
|
})
|
|
#endif
|
|
|
|
Name (DTRT, Package () {
|
|
/* CPU Throttle Effect on CPU */
|
|
Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 },
|
|
|
|
/* CPU Effect on Temp Sensor 0 */
|
|
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
|
|
|
|
#ifdef DPTF_ENABLE_CHARGER
|
|
/* Charger Effect on Temp Sensor 1 */
|
|
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 },
|
|
#endif
|
|
|
|
/* CPU Effect on Temp Sensor 1 */
|
|
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
|
|
|
|
/* CPU Effect on Temp Sensor 2 */
|
|
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
|
|
})
|
|
|
|
Name (MPPC, Package ()
|
|
{
|
|
0x2, /* Revision */
|
|
Package () { /* Power Limit 1 */
|
|
0, /* PowerLimitIndex, 0 for Power Limit 1 */
|
|
1600, /* PowerLimitMinimum */
|
|
6000, /* PowerLimitMaximum */
|
|
1000, /* TimeWindowMinimum */
|
|
1000, /* TimeWindowMaximum */
|
|
200 /* StepSize */
|
|
},
|
|
Package () { /* Power Limit 2 */
|
|
1, /* PowerLimitIndex, 1 for Power Limit 2 */
|
|
8000, /* PowerLimitMinimum */
|
|
8000, /* PowerLimitMaximum */
|
|
1000, /* TimeWindowMinimum */
|
|
1000, /* TimeWindowMaximum */
|
|
1000 /* StepSize */
|
|
}
|
|
})
|
|
|
|
/* Include DPTF */
|
|
#include <soc/intel/skylake/acpi/dptf/dptf.asl>
|