3ad00d0c89
This patch migrates a few useful MTRR functions as below from `earlymtrr.c` file to newly created common stage file `mtrrlib.c`. 1. get_free_var_mtrr 2. set_var_mtrr 3. clear_all_var_mtrr These functions can be used to perform the MTRR programming from IA common code SPI driver as `fast_spi.c` without requiring two separate implementations for early boot stage (till romstage) and for ramstage onwards. BUG=b:225766934 TEST=Able to build and boot google/redrix board to ChromeOS. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I2c62a04a36d3169545c3128b4231992ad9b3699d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63218 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <cpu/cpu.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <console/console.h>
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/* Get first available variable MTRR.
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* Returns var# if available, else returns -1.
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*/
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int get_free_var_mtrr(void)
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{
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msr_t maskm;
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int vcnt;
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int i;
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vcnt = get_var_mtrr_count();
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/* Identify the first var mtrr which is not valid. */
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for (i = 0; i < vcnt; i++) {
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maskm = rdmsr(MTRR_PHYS_MASK(i));
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if ((maskm.lo & MTRR_PHYS_MASK_VALID) == 0)
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return i;
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}
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/* No free var mtrr. */
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return -1;
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}
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void set_var_mtrr(
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unsigned int reg, unsigned int base, unsigned int size, unsigned int type)
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{
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/* Bit 32-35 of MTRRphysMask should be set to 1 */
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/* FIXME: It only support 4G less range */
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msr_t basem, maskm;
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if (!IS_POWER_OF_2(size))
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printk(BIOS_ERR, "MTRR Error: size %#x is not a power of two\n", size);
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if (size < 4 * KiB)
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printk(BIOS_ERR, "MTRR Error: size %#x smaller than 4KiB\n", size);
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if (base % size != 0)
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printk(BIOS_ERR, "MTRR Error: base %#x must be aligned to size %#x\n", base,
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size);
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basem.lo = base | type;
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basem.hi = 0;
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wrmsr(MTRR_PHYS_BASE(reg), basem);
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maskm.lo = ~(size - 1) | MTRR_PHYS_MASK_VALID;
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maskm.hi = (1 << (cpu_phys_address_size() - 32)) - 1;
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wrmsr(MTRR_PHYS_MASK(reg), maskm);
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}
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void clear_all_var_mtrr(void)
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{
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msr_t mtrr = {0, 0};
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int vcnt;
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int i;
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vcnt = get_var_mtrr_count();
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for (i = 0; i < vcnt; i++) {
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wrmsr(MTRR_PHYS_MASK(i), mtrr);
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wrmsr(MTRR_PHYS_BASE(i), mtrr);
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}
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}
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