48713a1bf7
We have means to easily disable a specific console in romstage if necessary, so this global option makes little sense. The option was initially introduced as a work-around for build issues around CACHE_AS_RAM, ROMCC and ARCH_ARMV7 dependencies for UARTs. Change-Id: I797bdd11a48ddd813d3ee7ccef9a0c050f16f669 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5607 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
60 lines
1.7 KiB
Makefile
60 lines
1.7 KiB
Makefile
# Run an intermediate step when producing coreboot.rom
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# that adds additional components to the final firmware
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# image outside of CBFS
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INTERMEDIATE += exynos5250_add_bl1
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bootblock-y += spi.c alternate_cbfs.c
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bootblock-y += pinmux.c mct.c power.c
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# Clock is required for UART
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
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ifeq ($(CONFIG_DRIVERS_UART),y)
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
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endif
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bootblock-y += wakeup.c
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bootblock-y += gpio.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c
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romstage-y += spi.c alternate_cbfs.c
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romstage-y += clock.c
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romstage-y += clock_init.c
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romstage-y += pinmux.c # required by s3c24x0_i2c and uart.
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romstage-y += dmc_common.c
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romstage-y += dmc_init_ddr3.c
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romstage-y += power.c
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romstage-y += mct.c
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romstage-y += monotonic_timer.c
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ifeq ($(CONFIG_DRIVERS_UART),y)
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romstage-y += uart.c
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endif
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romstage-y += wakeup.c
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romstage-y += gpio.c
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romstage-y += timer.c
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romstage-y += i2c.c
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#romstage-y += wdt.c
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romstage-y += cbmem.c
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ramstage-y += spi.c alternate_cbfs.c
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ramstage-y += clock.c
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ramstage-y += clock_init.c
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ramstage-y += pinmux.c
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ramstage-y += power.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += cpu.c
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ramstage-y += tmu.c
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ramstage-y += mct.c
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ramstage-y += monotonic_timer.c
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ramstage-y += timer.c
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ramstage-y += gpio.c
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ramstage-y += i2c.c
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ramstage-y += dp-reg.c
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ramstage-y += fb.c
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ramstage-y += usb.c
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ramstage-y += cbmem.c
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exynos5250_add_bl1: $(obj)/coreboot.pre
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printf " DD Adding Samsung Exynos5250 BL1\n"
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dd if=3rdparty/cpu/samsung/exynos5250/bl1.bin \
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of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
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