Change-Id: I6ea9b9d2353c0d767c837e6d629b45f23b306f6e Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14599 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
		
			
				
	
	
		
			73 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			73 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is part of the coreboot project.
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|  *
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|  * Copyright (C) 2007-2009 coresystems GmbH
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; version 2 of the License.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  */
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| 
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| #include <types.h>
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| #include <string.h>
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| #include <console/console.h>
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| #include <arch/acpi.h>
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| #include <arch/acpigen.h>
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| #include <device/device.h>
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| #include <device/pci.h>
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| #include <device/pci_ids.h>
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| #include <cbmem.h>
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| #include <arch/acpigen.h>
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| #include <cpu/cpu.h>
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| #include "sch.h"
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| 
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| unsigned long acpi_fill_mcfg(unsigned long current)
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| {
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| 	device_t dev;
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| 	u32 pciexbar = 0;
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| 	u32 pciexbar_reg;
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| 	int max_buses;
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| 
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| 	dev = dev_find_device(0x8086, 0x27a0, 0);
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| 	if (!dev)
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| 		return current;
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| 
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| 	pciexbar_reg = pci_read_config32(dev, 0x48);
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| 
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| 	/* MMCFG not supported or not enabled. */
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| 	if (!(pciexbar_reg & (1 << 0)))
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| 		return current;
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| 
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| 	switch ((pciexbar_reg >> 1) & 3) {
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| 	case 0: /* 256MB */
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| 		pciexbar = pciexbar_reg & ((1 << 31) | (1 << 30) | (1 << 29) |
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| 					   (1 << 28));
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| 		max_buses = 256;
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| 		break;
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| 	case 1: /* 128M */
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| 		pciexbar = pciexbar_reg & ((1 << 31) | (1 << 30) | (1 << 29) |
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| 					   (1 << 28) | (1 << 27));
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| 		max_buses = 128;
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| 		break;
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| 	case 2: /* 64M */
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| 		pciexbar = pciexbar_reg & ((1 << 31) | (1 << 30) | (1 << 29) |
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| 					   (1 << 28) | (1 << 27) | (1 << 26));
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| 		max_buses = 64;
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| 		break;
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| 	default: /* RSVD */
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| 		return current;
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| 	}
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| 
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| 	if (!pciexbar)
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| 		return current;
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| 
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| 	current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current,
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| 					     pciexbar, 0x0, 0x0, max_buses - 1);
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| 	return current;
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| }
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