f0b28d8d89
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I85e60c189c1ec1da5cf0e5b864447ef6f7b3f548 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
26 lines
635 B
C
26 lines
635 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <boot_device.h>
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#include <spi_flash.h>
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#include <stdint.h>
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/* The ROM is memory mapped just below 4GiB. Form a pointer for the base. */
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#define rom_base ((void *)(uintptr_t)(0x100000000ULL-CONFIG_ROM_SIZE))
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static const struct mem_region_device boot_dev =
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MEM_REGION_DEV_RO_INIT(rom_base, CONFIG_ROM_SIZE);
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const struct region_device *boot_device_ro(void)
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{
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return &boot_dev.rdev;
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}
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uint32_t spi_flash_get_mmap_windows(struct flash_mmap_window *table)
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{
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table->flash_base = 0;
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table->host_base = (uint32_t)(uintptr_t)rom_base;
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table->size = CONFIG_ROM_SIZE;
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return 1;
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}
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