Change-Id: I88f62c18b814ac0ddd356944359e727d6e3bba5a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58688 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Mariusz Szafrański <mariuszx.szafranski@intel.com>
14 lines
318 B
Plaintext
14 lines
318 B
Plaintext
config CPU_INTEL_MODEL_106CX
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bool
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select ARCH_X86
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select SSE2
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select UDELAY_TSC
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select TSC_MONOTONIC_TIMER
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select SIPI_VECTOR_IN_ROM
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select AP_IN_SIPI_WAIT
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select TSC_SYNC_MFENCE
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select SUPPORT_CPU_UCODE_IN_CBFS
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select SERIALIZED_SMM_INITIALIZATION
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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