50526d5a30
The romstage region is moved up a bit more to satisfy the MMU. Change-Id: I00c2b4972495fa669d4dc2a52f298a0e4d0cf5ff Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47105 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
31 lines
905 B
Plaintext
31 lines
905 B
Plaintext
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <memlayout.h>
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#include <arch/header.ld>
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/*
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* Memory map for QEMU virt machine since
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* a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019):
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*
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* 0..128MiB (0x0000_0000..0x0080_0000) is the space for a flash device.
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* 128MiB..256MiB (0x0080_0000..0x0100_0000) is used for miscellaneous device I/O.
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* 256MiB..1GiB (0x0100_0000..0x4000_0000) is reserved for possible future PCI support.
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* 1GiB.. (0x4000_0000) is RAM and the size depends on initial RAM and device memory settings.
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*/
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SECTIONS
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{
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REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8)
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REGION(secram, 0xe000000, 0x1000000, 4096)
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DRAM_START(0x40000000)
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BOOTBLOCK(0x60010000, 64K)
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STACK(0x60020000, 62K)
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FMAP_CACHE(0x6002F800, 2K)
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TIMESTAMP(0x60030000, 1K)
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ROMSTAGE(0x60031000, 128K)
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TTB(0x60070000, 128K)
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RAMSTAGE(0x600b0000, 16M)
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POSTRAM_CBFS_CACHE(0x61200000, 1M)
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}
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