Martin Roth 530b111c42 soc/amd/common: Add coreboot post codes to STB ...

Adding coreboot's postcodes to the smart trace buffer lets us see the
entire boot flow in one place.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I8eb9f777b303622c144203eb53e2e1bf3314afaa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

2022-10-28 21:37:24 +00:00

..

acpi

Revert "drivers/intel/dptf: Add multiple fan support under dptf"

2022-10-20 14:54:09 +00:00

arch

arch/x86: Clean up includes

2022-10-26 16:26:31 +00:00

commonlib

src/commonlib: Clean up includes

2022-10-26 16:27:10 +00:00

console

console/post.c: Sort includes

2022-10-27 15:46:39 +00:00

cpu

cpu/x86/mp_init.c: Use linked list data structures

2022-10-28 21:28:18 +00:00

device

src/device: Clean up includes

2022-10-26 16:38:11 +00:00

drivers

src/drivers: Clean up includes

2022-10-26 16:38:45 +00:00

ec

ec/google/wilco/superio: Fix PS2K under Windows

2022-10-25 15:13:54 +00:00

include

soc/intel/alderlake: Add Raptor Lake device IDs

2022-10-25 17:35:26 +00:00

lib

cbfs_verification: Remove dependency on VBOOT_STARTS_BEFORE_BOOTBLOCK

2022-10-26 17:19:22 +00:00

mainboard

mb/google/skyrim/var/winterhold: Update touchscreen devicetree setting

2022-10-28 21:10:22 +00:00

northbridge

nb/intel/i945/raminit: Use 'bool' for do_reset

2022-10-22 05:14:35 +00:00

sbom

Add SBOM (Software Bill of Materials) Generation

2022-08-22 14:48:46 +00:00

security

security/memory/memory.h: Add <stdbool.h>

2022-10-06 17:01:52 +00:00

soc

soc/amd/common: Add coreboot post codes to STB

2022-10-28 21:37:24 +00:00

southbridge

treewide: Use 'fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk'

2022-10-15 16:53:55 +00:00

superio

superio/ite/common/early_serial.c: ite_kill_watchdog: set timeout to 0

2022-08-07 19:54:43 +00:00

vendorcode

vc/amd/fsp: Add Glinda directory

2022-10-27 22:22:16 +00:00

Kconfig

Kconfig: Allow x86 to compress pre-ram stages if not run XIP

2022-10-20 14:48:05 +00:00