53461ad1f8
Add gpio pins configuration for cannonlake rvp u/y boards. Change-Id: Ia077a070979401fe7bd23bda110d2b66a038d9fc Signed-off-by: john zhao <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21139 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
27 lines
912 B
Makefile
27 lines
912 B
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2013 Google Inc.
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## Copyright (C) 2017 Intel Corporation.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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subdirs-y += spd
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bootblock-y += bootblock.c
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bootblock-$(CONFIG_CHROMEOS) += chromeos.c
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subdirs-y += variants/baseboard
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
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subdirs-y += variants/$(VARIANT_DIR)
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
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