534b564345
Apu2 boards use Infineon SLB9665 TT 2.0 module which is TPM2.0. Remove TPM1 option to allow choice between TPM1 and TPM2. SLB9665 TT 2.0 detection fixed in change 21983. Change-Id: Ie9788c43d8b32b2f6329a072b88c962c34eca119 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/28000 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
122 lines
2.8 KiB
Plaintext
122 lines
2.8 KiB
Plaintext
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2012 Advanced Micro Devices, Inc.
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# Copyright (C) 2015 Kyösti Mälkki <kyosti.malkki@gmail.com>
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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if BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || BOARD_PCENGINES_APU4 || \
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BOARD_PCENGINES_APU5
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select BINARYPI_LEGACY_WRAPPER
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select CPU_AMD_PI_00730F01
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select NORTHBRIDGE_AMD_PI_00730F01
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select SOUTHBRIDGE_AMD_PI_AVALON
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select SUPERIO_NUVOTON_NCT5104D
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_8192
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select HUDSON_DISABLE_IMC
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select USE_BLOBS
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select GENERIC_SPD_BIN
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select MAINBOARD_HAS_LPC_TPM
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select SEABIOS_ADD_SERCON_PORT_FILE if PAYLOAD_SEABIOS
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config MAINBOARD_DIR
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string
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default pcengines/apu2
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config VARIANT_DIR
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string
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default "apu2" if BOARD_PCENGINES_APU2
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default "apu3" if BOARD_PCENGINES_APU3
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default "apu4" if BOARD_PCENGINES_APU4
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default "apu5" if BOARD_PCENGINES_APU5
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config DEVICETREE
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string
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default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
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config MAINBOARD_PART_NUMBER
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string
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default "apu2" if BOARD_PCENGINES_APU2
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default "apu3" if BOARD_PCENGINES_APU3
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default "apu4" if BOARD_PCENGINES_APU4
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default "apu5" if BOARD_PCENGINES_APU5
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config MAX_CPUS
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int
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default 4
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config IRQ_SLOT_COUNT
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int
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default 11
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config ONBOARD_VGA_IS_PRIMARY
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bool
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default y
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config HUDSON_LEGACY_FREE
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bool
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default y
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config AGESA_BINARY_PI_FILE
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string
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default "3rdparty/blobs/mainboard/pcengines/apu2/AGESA.bin"
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choice
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prompt "J19 pins 1-10"
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default APU2_PINMUX_OFF_C if BOARD_PCENGINES_APU2 || \
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BOARD_PCENGINES_APU3 || BOARD_PCENGINES_APU4
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default APU2_PINMUX_UART_C if BOARD_PCENGINES_APU5
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config APU2_PINMUX_OFF_C
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bool "disable"
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config APU2_PINMUX_GPIO0
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bool "GPIO"
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depends on BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || \
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BOARD_PCENGINES_APU4
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config APU2_PINMUX_UART_C
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bool "UART 0x3e8"
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endchoice
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choice
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prompt "J19 pins 11-20"
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default APU2_PINMUX_OFF_D if BOARD_PCENGINES_APU2 || \
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BOARD_PCENGINES_APU3 || BOARD_PCENGINES_APU4
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default APU2_PINMUX_UART_D if BOARD_PCENGINES_APU5
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config APU2_PINMUX_OFF_D
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bool "disable"
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config APU2_PINMUX_GPIO1
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bool "GPIO"
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depends on BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || \
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BOARD_PCENGINES_APU4
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config APU2_PINMUX_UART_D
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bool "UART 0x2e8"
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endchoice
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config DIMM_SPD_SIZE
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int
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default 128
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endif # BOARD_PCENGINES_APU2
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