The headers added are generated as per Alder Lake N FSP v2503_00. Previous FSP version was v2503_00. Change include: Add following Emmc UPDs in Fsps.h - ScsEmmcEnabled - ScsEmmcHs400Enabled - EmmcUseCustomDlls - EmmcTxCmdDelayRegValue - EmmcTxDataDelay1RegValue - EmmcTxDataDelay2RegValue - EmmcRxCmdDataDelay1RegValue - EmmcRxCmdDataDelay2RegValue - EmmcRxStrobeDelayRegValue BUG=b:213828776 BRANCH=None Change-Id: I617673a0cb12e7165f2f63cce73fff38bc7bf827 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61857 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>