545ed7ab3b
Change-Id: Ib0839933f8b59f0c87cdda4e5374828bd6f1099f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/23759 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
101 lines
3.0 KiB
Makefile
101 lines
3.0 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright 2015 MediaTek Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y)
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bootblock-y += bootblock.c
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bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
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bootblock-y += i2c.c
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bootblock-y += ../common/pll.c pll.c
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bootblock-y += ../common/spi.c spi.c
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bootblock-y += ../common/timer.c
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bootblock-y += timer.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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endif
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bootblock-y += ../common/gpio.c gpio.c gpio_init.c pmic_wrap.c mt6391.c
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bootblock-y += ../common/wdt.c
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bootblock-y += ../common/mmu_operations.c mmu_operations.c
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################################################################################
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verstage-y += i2c.c
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verstage-y += ../common/spi.c spi.c
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verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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verstage-y += ../common/timer.c
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verstage-y += timer.c
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verstage-y += ../common/wdt.c
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verstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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verstage-y += ../common/gpio.c gpio.c
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################################################################################
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romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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romstage-y += ../common/pll.c pll.c
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romstage-y += ../common/timer.c
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romstage-y += timer.c
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romstage-y += i2c.c
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romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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romstage-y += ../common/cbmem.c
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romstage-y += ../common/gpio.c gpio.c
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romstage-y += ../common/spi.c spi.c
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romstage-y += pmic_wrap.c mt6391.c
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romstage-y += memory.c
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romstage-y += emi.c dramc_pi_basic_api.c dramc_pi_calibration_api.c
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romstage-y += ../common/mmu_operations.c mmu_operations.c
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romstage-y += rtc.c
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################################################################################
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ramstage-y += ../common/cbmem.c emi.c
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ramstage-y += ../common/spi.c spi.c
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ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
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ramstage-y += soc.c ../common/mtcmos.c
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ramstage-y += ../common/timer.c
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ramstage-y += timer.c
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ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
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ramstage-y += pmic_wrap.c mt6391.c i2c.c
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ramstage-y += mt6311.c
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ramstage-y += da9212.c
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ramstage-y += ../common/gpio.c gpio.c
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ramstage-y += ../common/wdt.c
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ramstage-y += ../common/pll.c pll.c
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ramstage-y += rtc.c
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ramstage-y += usb.c
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ramstage-y += ddp.c
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ramstage-y += dsi.c
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ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
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BL31_MAKEARGS += PLAT=mt8173
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################################################################################
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# Generate the actual coreboot bootblock code
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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./util/mtkheader/gen-bl-img.py mt8173 sf $< $@
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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endif
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