55009af42c
This patch changes all existing instances of clrsetbits_leXX() to the new endian-independent clrsetbitsXX(), after double-checking that they're all in SoC-specific code operating on CPU registers and not actually trying to make an endian conversion. This patch was created by running sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g' across the codebase and cleaning up formatting a bit. Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
104 lines
3.0 KiB
C
104 lines
3.0 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2018 Jonathan Neuschäfer
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* Copyright (C) 2019 HardenedLinux
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <boot_device.h>
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#include <symbols.h>
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#include <cbfs.h>
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#include <device/mmio.h>
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#include <soc/addressmap.h>
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#include <soc/spi.h>
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#include <soc/clock.h>
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#include <console/console.h>
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#include <spi_sdcard.h>
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/* follow is the FSBL boot device defined by ZSBL of sifive
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* FSBL replaced by bootblock of coreboot
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* MSEL_SPInx1 -> test if boot from memory-mapped on SPIn
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* MSEL_SPInx4 -> test if boot from memory-mapped on QPIn
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* MSEL_SPInSD -> test if boot from sdcard mount on SPIn */
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#define MSEL_SPI0x1(m) (((m) == 5) || ((m) == 14))
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#define MSEL_SPI0x4(m) (((m) == 6) || ((m) == 10) || ((m) == 15))
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#define MSEL_SPI1x1(m) ((m) == 12)
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#define MSEL_SPI1x4(m) (((m) == 7) || ((m) == 13))
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#define MSEL_SPI1SD(m) ((m) == 8)
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#define MSEL_SPI2x1(m) ((m) == 9)
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#define MSEL_SPI2SD(m) ((m) == 11)
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static struct spi_sdcard card;
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/* At 0x20000000: A 256MiB long memory-mapped view of the flash at QSPI0 */
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static struct mem_region_device spi_mdev =
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MEM_REGION_DEV_RO_INIT((void *)0x20000000, CONFIG_ROM_SIZE);
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static ssize_t unleashed_sd_readat(const struct region_device *rdev, void *dest,
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size_t offset, size_t count)
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{
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spi_sdcard_read(&card, dest, offset, count);
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return count;
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}
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static const struct region_device_ops unleashed_sd_ops = {
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.mmap = mmap_helper_rdev_mmap,
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.munmap = mmap_helper_rdev_munmap,
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.readat = unleashed_sd_readat,
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};
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static struct mmap_helper_region_device sd_mdev =
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MMAP_HELPER_REGION_INIT(&unleashed_sd_ops, 0, CONFIG_ROM_SIZE);
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const struct region_device *boot_device_ro(void)
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{
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uint32_t m = read32((uint32_t *)FU540_MSEL);
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if (MSEL_SPI0x1(m) || MSEL_SPI0x4(m))
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return &spi_mdev.rdev;
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if (MSEL_SPI2SD(m))
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return &sd_mdev.rdev;
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die("Wrong configuration of MSEL\n");
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return NULL;
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}
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const static struct fu540_spi_mmap_config spi_mmap_config = {
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.cmd_en = 1,
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.addr_len = 4,
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.pad_cnt = 6,
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.cmd_proto = FU540_SPI_PROTO_S,
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.addr_proto = FU540_SPI_PROTO_Q,
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.data_proto = FU540_SPI_PROTO_Q,
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.cmd_code = 0xec,
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.pad_code = 0
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};
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void boot_device_init(void)
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{
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uint32_t m = read32((uint32_t *)FU540_MSEL);
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if (MSEL_SPI0x1(m) || MSEL_SPI0x4(m)) {
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struct spi_slave slave;
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/* initialize spi controller */
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spi_setup_slave(0, 0, &slave);
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/* map flash to memory space */
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fu540_spi_mmap(&slave, &spi_mmap_config);
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return;
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}
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if (MSEL_SPI2SD(m)) {
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spi_sdcard_init(&card, 2, 0);
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mmap_helper_device_init(&sd_mdev,
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_cbfs_cache, REGION_SIZE(cbfs_cache));
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return;
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}
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die("Wrong configuration of MSEL\n");
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}
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