Files
system76-coreboot/src/pc80/serial.inc
Eric Biederman 5cd81730ec - Moved hlt() to it's own header.
- Reworked pnp superio device support.  Now complete superio support is less than 100 lines.
- Added support for hard coding resource assignments in Config.lb
- Minor bug fixes to romcc
- Initial support for catching the x86 processor BIST error codes.  I've only seen
  this trigger once in production during a very suspcious reset but...
- added raminit_test to test the code paths in raminit.c for the Opteron
- Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED
  so we can tell what we have really done.
- Added generic AGP/IOMMU setting code to x86
- Added an implementation of memmove and removed reserved identifiers from memcpy
- Added minimal support for booting on pre b3 stepping K8 cores
- Moved the checksum on amd8111 boards because our default location was on top of
  extended RTC registers
- On the Hdama added support for enabling i2c hub so we can get at the temperature
  sensors.  Not that i2c bus was implemented well enough to make that useful.
- Redid the Opteron port so we should only need one reset and most of memory initialization
  is done in cpu_fixup.  This is much, much faster.
- Attempted to make the VGA IO region assigment work.  The code seems to work now...
- Redid the error handling in amdk8/raminit.c to distinguish between a bad value
  and a smbus error, and moved memory clearing out to cpufixup.
- Removed CONFIG_KEYBOARD as it was useless.  See pc87360/superio.c for how to
  setup a legacy keyboard properly.
- Reworked the register values for standard hardware, moving the defintions from
  chip.h into the headers of the initialization routines.  This is much saner
  and is actually implemented.
- Made the hdama port an under clockers BIOS.  I debuged so many interesting problems.
- On amd8111_lpc added setup of architectural/legacy hardware
- Enabled PCI error reporting as much as possible.
- Enhanded build_opt_tbl to generate a header of the cmos option locations so
  that romcc compiled code can query the cmos options.
- In romcc gracefully handle function names that degenerate into function pointers
- Bumped the version to 1.1.6 as we are getting closer to 2.0

  TODO finish optimizing the HT links of non dual boards
  TODO make all Opteron board work again
  TODO convert all superio devices to use the new helpers
  TODO convert the via/epia to freebios2 conventions
  TODO cpu fixup/setup by cpu type


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11 15:01:31 +00:00

108 lines
1.9 KiB
PHP

#include <part/fallback_boot.h>
/* Base Address */
#ifndef TTYS0_BASE
#define TTYS0_BASE 0x3f8
#endif
/* Baud Rate */
#ifndef TTYS0_BAUD
#define TTYS0_BAUD 115200
#endif
#if ((115200%TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
/* Baud Rate Divisor */
#define TTYS0_DIV (115200/TTYS0_BAUD)
#define TTYS0_DIV_LO (TTYS0_DIV&0xFF)
#define TTYS0_DIV_HI ((TTYS0_DIV >> 8)&0xFF)
/* Line Control Settings */
#ifndef TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
#define TTYS0_LCS 0x3
#endif
/* Data */
#define TTYS0_RBR (TTYS0_BASE+0x00)
/* Control */
#define TTYS0_TBR TTYS0_RBR
#define TTYS0_IER (TTYS0_BASE+0x01)
#define TTYS0_IIR (TTYS0_BASE+0x02)
#define TTYS0_FCR TTYS0_IIR
#define TTYS0_LCR (TTYS0_BASE+0x03)
#define TTYS0_MCR (TTYS0_BASE+0x04)
#define TTYS0_DLL TTYS0_RBR
#define TTYS0_DLM TTYS0_IER
/* Status */
#define TTYS0_LSR (TTYS0_BASE+0x05)
#define TTYS0_MSR (TTYS0_BASE+0x06)
#define TTYS0_SCR (TTYS0_BASE+0x07)
#if USE_OPTION_TABLE == 1
.section ".rom.data"
.type div,@object
.size div,8
div:
.byte 1,2,3,6,12,24,48,96
.previous
#endif
jmp serial0
/* uses: ax, dx */
#define TTYS0_TX_AL \
mov %al, %ah ; \
9: mov $TTYS0_LSR, %dx ; \
inb %dx, %al ; \
test $0x20, %al ; \
je 9b ; \
mov $TTYS0_TBR, %dx ; \
mov %ah, %al ; \
outb %al, %dx
serial_init:
/* Set 115.2Kbps,8n1 */
/* Set 8bit, 1 stop bit, no parity, DLAB */
mov $TTYS0_LCR, %dx
mov $(TTYS0_LCS | 0x80), %al
out %al, %dx
/* set Baud Rate Divisor to 1 ==> 115200 Buad */
#if USE_OPTION_TABLE == 1
movb $(RTC_BOOT_BYTE+1), %al
outb %al, $0x70
xorl %edx,%edx
inb $0x71, %al
andb $7,%al
movb %al,%dl
movb div(%edx),%al
mov $TTYS0_DLL, %dx
out %al, %dx
mov $TTYS0_DLM, %dx
xorb %al,%al
out %al, %dx
#else
mov $TTYS0_DLL, %dx
mov $TTYS0_DIV_LO, %al
out %al, %dx
mov $TTYS0_DLM, %dx
mov $TTYS0_DIV_HI, %al
out %al, %dx
#endif
/* Disable DLAB */
mov $TTYS0_LCR, %dx
mov $(TTYS0_LCS & 0x7f), %al
out %al, %dx
RETSP
serial0:
CALLSP(serial_init)