669e155ad2
As discussed on the mailing list and voted upon, the coreboot project is going to move the majority of copyrights out of the headers and into an AUTHORS file. This will happen a bit at a time, as we'll be unifying license headers at the same time. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Id3382d19088cba2703350339b0bd0cfb3c0e63b2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34604 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
61 lines
1.4 KiB
C
61 lines
1.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "sata.h"
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#include <arch/acpi.h>
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#include <arch/acpigen.h>
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/* e.g.
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* generate_sata_ssdt_ports("\_SB.PCI0.SATA", 0x3);
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* generates:
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* Scope (\_SB.PCI0.SATA)
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* {
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* Device (PR00)
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* {
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* Name (_ADR, 0x0000FFFF) // _ADR: Address
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* }
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*
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* Device (PR01)
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* {
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* Name (_ADR, 0x0001FFFF) // _ADR: Address
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* }
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* }
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*
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*/
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void generate_sata_ssdt_ports(const char *scope, uint32_t enable_map)
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{
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int i;
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uint32_t bit;
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char port_name[4] = "PR00";
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acpigen_write_scope(scope);
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/* generate a device for every enabled port */
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for (i = 0; i < 32; i++) {
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bit = 1 << i;
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if (!(bit & enable_map))
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continue;
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port_name[2] = '0' + i / 10;
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port_name[3] = '0' + i % 10;
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acpigen_write_device(port_name);
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acpigen_write_name_dword("_ADR", 0xffff + i * 0x10000);
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acpigen_pop_len(); /* close PRT%d */
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}
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acpigen_pop_len(); /* close scope */
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}
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