ba22e159bb
Calling disable_cache_as_ram() with valuables in stack is not a stable solution, as per documentation AMD_DISABLE_STACK should destroy stack in cache. Change-Id: I986bb7a88f53f7f7a0b05d4edcd5020f5dbeb4b7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18626 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
96 lines
2.5 KiB
C
96 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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#include <console/console.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/amd/car.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/x86/cache.h>
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#include <cbmem.h>
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#include <program_loading.h>
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#include <string.h>
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#include <halt.h>
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#include "s3_resume.h"
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#include <northbridge/amd/agesa/agesa_helper.h>
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static void move_stack_high_mem(void)
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{
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uintptr_t high_stack = romstage_ram_stack_base(HIGH_ROMSTAGE_STACK_SIZE,
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ROMSTAGE_STACK_CBMEM);
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if (!high_stack)
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halt();
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/* TODO: Make the switch with empty stack instead. */
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memcpy((void*)high_stack, (void *)BSP_STACK_BASE_ADDR, HIGH_ROMSTAGE_STACK_SIZE);
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/* TODO: We only switch stack on BSP. */
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#ifdef __x86_64__
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__asm__
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volatile ("add %0, %%rsp; add %0, %%rbp; invd"::"g"
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(high_stack - BSP_STACK_BASE_ADDR)
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:);
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#else
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__asm__
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volatile ("add %0, %%esp; add %0, %%ebp; invd"::"g"
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(high_stack - BSP_STACK_BASE_ADDR)
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:);
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#endif
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}
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void set_resume_cache(void)
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{
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msr_t msr;
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/* disable fixed mtrr for now, it will be enabled by mtrr restore */
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msr = rdmsr(SYSCFG_MSR);
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msr.lo &= ~(SYSCFG_MSR_MtrrFixDramEn | SYSCFG_MSR_MtrrFixDramModEn);
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wrmsr(SYSCFG_MSR, msr);
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/* Enable cached access to RAM in the range 0M to CACHE_TMP_RAMTOP */
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msr.lo = 0 | MTRR_TYPE_WRBACK;
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msr.hi = 0;
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wrmsr(MTRR_PHYS_BASE(0), msr);
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msr.lo = ~(CACHE_TMP_RAMTOP - 1) | MTRR_PHYS_MASK_VALID;
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msr.hi = (1 << (CONFIG_CPU_ADDR_BITS - 32)) - 1;
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wrmsr(MTRR_PHYS_MASK(0), msr);
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/* Set the default memory type and disable fixed and enable variable MTRRs */
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msr.hi = 0;
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msr.lo = (1 << 11);
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wrmsr(MTRR_DEF_TYPE_MSR, msr);
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enable_cache();
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}
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void prepare_for_resume(void)
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{
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if (cbmem_recovery(1)) {
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printk(BIOS_EMERG, "Unable to recover CBMEM\n");
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halt();
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}
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post_code(0x62);
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printk(BIOS_DEBUG, "Move CAR stack.\n");
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move_stack_high_mem();
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post_code(0x63);
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disable_cache_as_ram();
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printk(BIOS_DEBUG, "CAR disabled.\n");
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set_resume_cache();
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}
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