5a22b14d47
Models 6ex and 6fx select UDELAY_LAPIC so cannot select contradicting UDELAY_TSC here. Model 1067x requires speedstep. Change-Id: I69d3ec8085912dfbe5fe31c81fa0a437228fa48f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/2525 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
28 lines
536 B
Plaintext
28 lines
536 B
Plaintext
config CPU_INTEL_SOCKET_LGA775
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bool
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if CPU_INTEL_SOCKET_LGA775
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config SOCKET_SPECIFIC_OPTIONS # dummy
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def_bool y
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select CPU_INTEL_MODEL_6EX
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select CPU_INTEL_MODEL_6FX
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select CPU_INTEL_MODEL_F3X
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select CPU_INTEL_MODEL_F4X
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# select CPU_INTEL_MODEL_F6X
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# select CPU_INTEL_MODEL_1066X
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select CPU_INTEL_MODEL_1067X
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select MMX
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select SSE
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select SIPI_VECTOR_IN_ROM
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config DCACHE_RAM_SIZE
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hex
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default 0x4000 # 16 kB
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config DCACHE_RAM_BASE
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hex
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default 0xfeffc000 # 4GB - 16MB - DCACHE_RAM_SIZE
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endif # CPU_INTEL_SOCKET_LGA775
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