Eric Lai 5bb5c43b93 mb/google/brya: Initiate peripheral buses ...

Initiate peripheral buses based on latest schematic.

BUG=b:174266035
TEST=Build Test

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I3a828bfb3ba4ee9a9b41cd4e83701672e5ef85bf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

2020-12-29 14:42:12 +00:00

..

acpi

ACPI: Allocate GNVS early in ramstage

2020-12-25 02:29:14 +00:00

arch

arch/arm: Replace .id section with build_info in CBFS

2020-12-17 06:25:25 +00:00

commonlib

drivers/tpm: Implement full PPI

2020-12-21 02:38:20 +00:00

console

lib/trace: Remove TRACE support

2020-12-02 23:35:58 +00:00

cpu

cpu/intel/model_206ax: Add more CPU steppings

2020-12-25 22:01:00 +00:00

device

device/pnp: add register PNP_IO4

2020-12-28 21:01:08 +00:00

drivers

drivers/intel/gma: drop unused register to resolve name conflict

2020-12-28 17:29:37 +00:00

ec

src: Remove redundant use of ACPI offset(0)

2020-12-03 00:05:52 +00:00

include

device/pnp: add register PNP_IO4

2020-12-28 21:01:08 +00:00

lib

ACPI: Allocate GNVS early in ramstage

2020-12-25 02:29:14 +00:00

mainboard

mb/google/brya: Initiate peripheral buses

2020-12-29 14:42:12 +00:00

northbridge

kconfig: remove non-existent source

2020-12-28 13:37:56 +00:00

security

sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable

2020-12-29 14:41:15 +00:00

soc

sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable

2020-12-29 14:41:15 +00:00

southbridge

sb/amd/pi/hudson: Enable use of common GPIO API

2020-12-28 13:37:15 +00:00

superio

src/superio: trim and move Makefile.inc, instead use wildcard matches

2020-12-27 14:46:07 +00:00

vendorcode

sb/amd/pi/hudson: Enable use of common GPIO API

2020-12-28 13:37:15 +00:00

Kconfig

Kconfig: Show console debug options if loglevel override is set

2020-12-11 15:58:24 +00:00