- Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
726 lines
15 KiB
Plaintext
726 lines
15 KiB
Plaintext
#######################################################
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#
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# Main options file for LinuxBIOS
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#
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# Each option used by a part must be defined in
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# this file. The format for options is:
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#
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# define <name>
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# default <expr> | {<expr>} | "<string>" | none
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# format "<string>"
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# export always | used | never
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# comment "<string>"
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# end
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#
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# where
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#
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# <name> is the name of the option
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# <expr> is a numeric expression
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# <string> is a string
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#
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# Either a default value or 'default none' must
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# be specified for every option. An option
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# specified as 'default none' will not be exported
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# (i.e. will remain undefined) unless it has
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# been assigned a value.
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#
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# Option values can be an immediate expression that
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# evaluates to a numeric value, a delayed expression
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# (surrounded by curley braces), or a string
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# (surrounded by double quotes.)
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#
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# Immediate expressions are evaluated at the time an
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# option is defined or set and the numeric result
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# becomes the value of the option.
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#
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# Delayed expression are evaluated at the time the
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# option is used, either in another expression or
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# when being exported.
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#
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# String values will have the double quotes removed
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# automatically.
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#
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# Format strings determine the print format that is
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# used when exporting options. The default format
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# is "%s" for strings and "%d" for numbers.
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#
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# Exported options generate entries in the
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# Makefile.settings file. Options can be always
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# exported, exported only if used, or never exported.
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#
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# A comment string must be supplied for every option.
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#
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#######################################################
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###############################################
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# Architecture options
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###############################################
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define ARCH
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default "i386"
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export always
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comment "Default architecture is i386, options are alpha and ppc"
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end
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define k7
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default none
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export always
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comment "We're a k7"
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end
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define k8
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default none
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export always
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comment "We're a k8"
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end
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define i586
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default none
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export always
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comment "We're a 586"
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end
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define i686
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default none
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export always
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comment "We're a 686"
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end
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define CPU_FIXUP
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default none
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export always
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comment "Do CPU fixups"
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end
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###############################################
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# Build options
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###############################################
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define CROSS_COMPILE
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default ""
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export always
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comment "Cross compiler prefix"
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end
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define CC
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default "$(CROSS_COMPILE)gcc"
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export always
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comment "Target C Compiler"
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end
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define HOSTCC
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default "gcc"
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export always
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comment "Host C Compiler"
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end
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define CPU_OPT
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default none
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export used
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comment "Additional per-cpu CFLAGS"
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end
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define OBJCOPY
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default "$(CROSS_COMPILE)objcopy"
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export always
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comment "Objcopy command"
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end
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define LINUXBIOS_VERSION
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default "1.1.6"
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export always
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comment "LinuxBIOS version"
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end
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define LINUXBIOS_EXTRA_VERSION
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default ""
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export used
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comment "LinuxBIOS extra version"
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end
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define LINUXBIOS_BUILD
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default "$(shell date)"
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export always
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comment "Build date"
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end
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define LINUXBIOS_COMPILE_TIME
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default "$(shell date +%T)"
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export always
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comment "Build time"
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end
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define LINUXBIOS_COMPILE_BY
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default "$(shell whoami)"
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export always
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comment "Who build this image"
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end
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define LINUXBIOS_COMPILE_HOST
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default "$(shell hostname)"
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export always
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comment "Build host"
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end
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define LINUXBIOS_COMPILE_DOMAIN
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default "$(shell dnsdomainname)"
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export always
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comment "Build domain name"
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end
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define LINUXBIOS_COMPILER
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default "$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)"
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export always
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comment "Build compiler"
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end
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define LINUXBIOS_LINKER
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default "$(shell $(CC) -Wl,-v 2>&1 | grep version | tail -n 1)"
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export always
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comment "Build linker"
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end
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define LINUXBIOS_ASSEMBLER
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default "$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )"
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export always
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comment "Build assembler"
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end
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define CONFIG_CHIP_CONFIGURE
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default 0
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export used
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comment "Use new chip_configure method for configuring (non-pci) devices"
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end
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define CONFIG_USE_INIT
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default 0
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export used
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comment "Use stage 1 initialization code"
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end
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###############################################
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# ROM image options
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###############################################
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define HAVE_FALLBACK_BOOT
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format "%d"
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default 0
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export always
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comment "Set if fallback booting required"
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end
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define USE_FALLBACK_IMAGE
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format "%d"
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default 0
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export used
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comment "Set to build a fallback image"
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end
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define FALLBACK_SIZE
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default 65536
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format "0x%x"
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export used
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comment "Default fallback image size"
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end
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define ROM_SIZE
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default none
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format "0x%x"
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export used
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comment "Size of your ROM"
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end
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define ROM_IMAGE_SIZE
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default 65535
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format "0x%x"
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export always
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comment "Default image size"
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end
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define ROM_SECTION_SIZE
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default {FALLBACK_SIZE}
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format "0x%x"
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export used
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comment "Default rom section size"
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end
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define ROM_SECTION_OFFSET
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default {ROM_SIZE - FALLBACK_SIZE}
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format "0x%x"
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export used
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comment "Default rom section offset"
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end
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define PAYLOAD_SIZE
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default {ROM_SECTION_SIZE - ROM_IMAGE_SIZE}
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format "0x%x"
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export always
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comment "Default payload size"
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end
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define _ROMBASE
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default {PAYLOAD_SIZE}
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format "0x%x"
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export always
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comment "Base address of LinuxBIOS in ROM"
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end
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define _ROMSTART
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default none
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format "0x%x"
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export used
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comment "Start address of LinuxBIOS in ROM"
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end
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define _RESET
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default {_ROMBASE}
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format "0x%x"
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export always
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comment "Hardware reset vector address"
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end
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define _EXCEPTION_VECTORS
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default {_ROMBASE+0x100}
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format "0x%x"
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export always
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comment "Address of exception vector table"
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end
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define STACK_SIZE
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default 0x2000
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format "0x%x"
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export always
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comment "Default stack size"
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end
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define HEAP_SIZE
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default 0x2000
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format "0x%x"
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export used
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comment "Default heap size"
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end
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define _RAMBASE
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default none
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format "0x%x"
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export always
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comment "Base address of LinuxBIOS in RAM"
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end
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define _RAMSTART
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default none
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format "0x%x"
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export used
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comment "Start address of LinuxBIOS in RAM"
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end
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define USE_DCACHE_RAM
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default 0
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export used
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comment "Use data cache as temporary RAM if possible"
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end
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define DCACHE_RAM_BASE
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default none
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format "0x%x"
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export used
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comment "Base address of data cache when using it for temporary RAM"
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end
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define DCACHE_RAM_SIZE
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default none
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format "0x%x"
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export used
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comment "Size of data cache when using it for temporary RAM"
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end
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define XIP_ROM_BASE
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default 0
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format "0x%x"
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export used
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comment "Start address of area to cache during LinuxBIOS execution directly from ROM"
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end
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define XIP_ROM_SIZE
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default 0
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format "0x%x"
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export used
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comment "Size of area to cache during LinuxBIOS execution directly from ROM"
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end
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define CONFIG_COMPRESS
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default 1
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export always
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comment "Set for compressed image"
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end
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define CONFIG_UNCOMPRESSED
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format "%d"
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default {!CONFIG_COMPRESS}
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export always
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comment "Set for uncompressed image"
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end
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define CONFIG_LB_MEM_TOPK
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format "%d"
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default 1024
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export always
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comment "Kilobytes of memory to initialized before executing code from RAM"
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end
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define HAVE_OPTION_TABLE
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default 0
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export always
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comment "Export CMOS option table"
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end
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define USE_OPTION_TABLE
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format "%d"
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default {HAVE_OPTION_TABLE && !USE_FALLBACK_IMAGE}
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export always
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comment "Use option table"
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end
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###############################################
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# CMOS variable options
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###############################################
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define LB_CKS_RANGE_START
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default 49
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format "%d"
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export always
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comment "First CMOS byte to use for LinuxBIOS options"
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end
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define LB_CKS_RANGE_END
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default 125
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format "%d"
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export always
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comment "Last CMOS byte to use for LinuxBIOS options"
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end
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define LB_CKS_LOC
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default 126
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format "%d"
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export always
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comment "Pair of bytes to use for CMOS checksum"
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end
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###############################################
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# Build targets
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###############################################
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define CRT0
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default "$(TOP)/src/arch/$(ARCH)/config/crt0.base"
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export always
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comment "Main initialization target"
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end
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###############################################
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# Debugging/Logging options
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###############################################
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define DEBUG
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default 1
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export always
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comment "Enable debugging code"
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end
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define CONFIG_CONSOLE_VGA
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default 0
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export always
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comment "Log messages to VGA"
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end
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define CONFIG_CONSOLE_LOGBUF
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default 0
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export always
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comment "Log messages to buffer"
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end
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define CONFIG_CONSOLE_SROM
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default 0
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export always
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comment "Log messages to SROM console"
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end
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define CONFIG_CONSOLE_SERIAL8250
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default 0
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export always
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comment "Log messages to 8250 uart based serial console"
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end
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define DEFAULT_CONSOLE_LOGLEVEL
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default 7
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export always
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comment "Console will log at this level unless changed"
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end
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define MAXIMUM_CONSOLE_LOGLEVEL
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default 8
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export always
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comment "Error messages up to this level can be printed"
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end
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define NO_POST
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default none
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export always
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comment "Disable POST codes"
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end
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define TTYS0_BASE
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default 0x3f8
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format "0x%x"
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export always
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comment "Base address for 8250 uart for the serial console"
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end
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define TTYS0_BAUD
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default 115200
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export always
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comment "Default baud rate for serial console"
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end
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define TTYS0_DIV
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default none
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format "%d"
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export used
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comment "Allow UART divisor to be set explicitly"
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end
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define TTYS0_LCS
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default 0x3
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format "0x%x"
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export always
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comment "Default flow control settings for the 8250 serial console uart"
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end
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###############################################
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# Mainboard options
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###############################################
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define MAINBOARD
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default "Mainboard_not_set"
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export always
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comment "Mainboard name"
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end
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define MAINBOARD_PART_NUMBER
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default "Part_number_not_set"
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export always
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comment "Part number of mainboard"
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end
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define MAINBOARD_VENDOR
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default "Vendor_not_set"
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export always
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comment "Vendor of mainboard"
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end
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define MAINBOARD_POWER_ON_AFTER_POWER_FAIL
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default none
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export used
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comment "Default power on after power fail setting"
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end
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define CONFIG_SYS_CLK_FREQ
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default none
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export used
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comment "System clock frequency in MHz"
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end
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define CONFIG_LEGACY_VGABIOS
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default 0
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export used
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comment "Support for legacy VGA BIOS"
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end
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###############################################
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# SMP options
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###############################################
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define CONFIG_SMP
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default 0
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export always
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comment "Define if we support SMP"
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end
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define CONFIG_MAX_CPUS
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default 1
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export always
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comment "Maximum CPU count for this machine"
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end
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define CONFIG_MAX_PHYSICAL_CPUS
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default {CONFIG_MAX_CPUS}
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export always
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comment "Physical CPU count for this machine"
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end
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define CONFIG_LOGICAL_CPUS
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default 0
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export always
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comment "Should multiple cpus per die be enabled?"
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end
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define HAVE_MP_TABLE
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default none
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export always
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comment "Define to build an MP table"
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end
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###############################################
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# Boot options
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###############################################
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define CONFIG_IDE_STREAM
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default 0
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export always
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comment "Boot from IDE device"
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end
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define CONFIG_ROM_STREAM
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default 0
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export always
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comment "Boot image is located in ROM"
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end
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define CONFIG_ROM_STREAM_START
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default {0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1}
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format "0x%x"
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export always
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comment "ROM stream start location"
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end
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###############################################
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# IRQ options
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###############################################
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define HAVE_PIRQ_TABLE
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default none
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export always
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comment "Define if we have a PIRQ table"
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end
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define IRQ_SLOT_COUNT
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default none
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export always
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comment "Number of IRQ slots"
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end
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define CONFIG_PCIBIOS_IRQ
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default none
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|
export always
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|
comment "PCIBIOS IRQ support"
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|
end
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define CONFIG_IOAPIC
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|
default none
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|
export always
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|
comment "IOAPIC support"
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end
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###############################################
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# IDE specific options
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###############################################
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define IDE_BOOT_DRIVE
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default 0
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|
export always
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|
comment "Disk number of boot drive"
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end
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define IDE_SWAB
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|
default none
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|
export always
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|
comment "Swap bytes when reading from IDE device"
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|
end
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define IDE_OFFSET
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|
default 0
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|
export always
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|
comment "Sector at which to start searching for boot image"
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end
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|
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###############################################
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# Options for memory mapped I/O
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###############################################
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define PCIC0_CFGADDR
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|
default none
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|
format "0x%x"
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|
export used
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|
comment "Address of PCI Configuration Address Register"
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|
end
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|
define PCIC0_CFGDATA
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|
default none
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|
format "0x%x"
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|
export used
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|
comment "Address of PCI Configuration Data Register"
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|
end
|
|
define ISA_IO_BASE
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|
default none
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|
format "0x%x"
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|
export used
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|
comment "Base address of PCI/ISA I/O address range"
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|
end
|
|
define ISA_MEM_BASE
|
|
default none
|
|
format "0x%x"
|
|
export used
|
|
comment "Base address of PCI/ISA memory address range"
|
|
end
|
|
define PNP_CFGADDR
|
|
default none
|
|
format "0x%x"
|
|
export used
|
|
comment "PNP Configuration Address Register offset"
|
|
end
|
|
define PNP_CFGDATA
|
|
default none
|
|
format "0x%x"
|
|
export used
|
|
comment "PNP Configuration Data Register offset"
|
|
end
|
|
define _IO_BASE
|
|
default none
|
|
format "0x%x"
|
|
export used
|
|
comment "Base address of memory mapped I/O operations"
|
|
end
|
|
|
|
###############################################
|
|
# Options for embedded systems
|
|
###############################################
|
|
|
|
define EMBEDDED_RAM_SIZE
|
|
default none
|
|
export used
|
|
comment "Embedded boards generally have fixed RAM size"
|
|
end
|
|
|
|
###############################################
|
|
# Misc options
|
|
###############################################
|
|
|
|
define HAVE_HARD_RESET
|
|
default none
|
|
export used
|
|
comment "Have hard reset"
|
|
end
|
|
define MEMORY_HOLE
|
|
default none
|
|
export used
|
|
comment "Set to deal with memory hole"
|
|
end
|
|
define MAX_REBOOT_CNT
|
|
default 3
|
|
export always
|
|
comment "Set maximum reboots"
|
|
end
|
|
|
|
###############################################
|
|
# Misc device options
|
|
###############################################
|
|
|
|
define CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
|
default 0
|
|
export used
|
|
comment "Use timer2 to callibrate the x86 time stamp counter"
|
|
end
|
|
define INTEL_PPRO_MTRR
|
|
default none
|
|
export always
|
|
comment ""
|
|
end
|
|
define CONFIG_UDELAY_TSC
|
|
default 0
|
|
export used
|
|
comment "Implement udelay with the x86 time stamp counter"
|
|
end
|
|
define FAKE_SPDROM
|
|
default 0
|
|
export always
|
|
comment "Use this to fake spd rom values"
|
|
end
|
|
|
|
define HAVE_ACPI_TABLES
|
|
default 0
|
|
export always
|
|
comment "Define to build ACPI tables"
|
|
end
|
|
|
|
|
|
###############################################
|
|
# Board specific options
|
|
###############################################
|
|
|
|
###############################################
|
|
# Options for motorola/sandpoint
|
|
###############################################
|
|
define CONFIG_SANDPOINT_ALTIMUS
|
|
default 0
|
|
export never
|
|
comment "Configure Sandpoint with Altimus PMC"
|
|
end
|
|
define CONFIG_SANDPOINT_TALUS
|
|
default 0
|
|
export never
|
|
comment "Configure Sandpoint with Talus PMC"
|
|
end
|
|
define CONFIG_SANDPOINT_UNITY
|
|
default 0
|
|
export never
|
|
comment "Configure Sandpoint with Unity PMC"
|
|
end
|
|
define CONFIG_SANDPOINT_VALIS
|
|
default 0
|
|
export never
|
|
comment "Configure Sandpoint with Valis PMC"
|
|
end
|
|
define CONFIG_SANDPOINT_GYRUS
|
|
default 0
|
|
export never
|
|
comment "Configure Sandpoint with Gyrus PMC"
|
|
end
|
|
|
|
###############################################
|
|
# Options for totalimpact/briq
|
|
###############################################
|
|
define CONFIG_BRIQ_750FX
|
|
default 0
|
|
export never
|
|
comment "Configure briQ with PowerPC 750FX"
|
|
end
|
|
define CONFIG_BRIQ_7400
|
|
default 0
|
|
export never
|
|
comment "Configure briQ with PowerPC G4"
|
|
end
|