Files
system76-coreboot/src/mainboard/asus/a88xm-e/devicetree.cb
Balazs Vinarz ffa710b9dd mb/asus: Add Asus A88XM-E FM2+ with documentation
The port is based on the F2A85-M, the main differences are:
- 2 DDR3 dimms
- 2 PS/2 ports
- 2*USB2.0 and 2*USB3.0 ports
- 3+2 phase VRM
- 6 channel audio
- 6 SATA ports
- ASP1206 VRM controller
- Bolton D4 chipset
- no optical SPDIF/IO

Successfully booted configurations:
-RAM: 2*8GB Kingston KVR 1333Mhz LP, 2*8GB Crucial BLT8G3D1869DT1TX0
-CPU: AMD A8-6500 (Richland), AMD A10-6700 (Richland)
-OS:  Arch Linux 4.19 (SATA, USB), Linux Mint 19.3, Artix Linux 2019
-SeaBIOS: 1.12 and 1.13

Known problems:
- IRQ routing is done incorrect way - common problem of fam15h boards
- Windows 7 can't boot because of the incomplete ACPI implementation

Change-Id: I60fa0636ba41f5f1a6a3faa2764bf2f0a968cf90
Signed-off-by: Balazs Vinarz <vinibali1@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30987
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-13 17:34:04 +00:00

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# SPDX-License-Identifier: GPL-2.0-only
chip northbridge/amd/agesa/family15tn/root_complex
device cpu_cluster 0 on
chip cpu/amd/agesa/family15tn
device lapic 10 on end
end
end
device domain 0 on
subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU
device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
device pci 1.1 on end # Internal Multimedia (iGPU Audio)
device pci 2.0 on end # PCIEX16
device pci 3.0 off end # -
device pci 4.0 off end # PCIe x4 (?)
device pci 5.0 off end # PCIe x1 (?)
device pci 6.0 off end # PCIe x1 (?)
device pci 7.0 off end # PCIe x1 (?)
device pci 8.0 off end # NB/SB Link P2P bridge
end #chip northbridge/amd/agesa/family15tn
chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
device pci 10.0 on end # XHCI HC0
device pci 10.1 on end # XHCI HC1
device pci 11.0 on end # SATA AHCI
device pci 12.0 on end # USB OHCI
device pci 12.2 on end # USB EHCI
device pci 13.0 on end # USB OHCI
device pci 13.2 on end # USB EHCI
device pci 14.0 on end # SMBUS
device pci 14.1 off end # IDE
device pci 14.2 on end # HDA
device pci 14.3 on # LPC
chip superio/ite/it8728f
register "TMPIN1.mode" = "THERMAL_RESISTOR"
register "TMPIN2.mode" = "THERMAL_RESISTOR"
register "TMPIN3.mode" = "THERMAL_RESISTOR"
register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
register "FAN1.smart.tmpin" = "1"
register "FAN1.smart.tmp_off" = "0x80" # never
register "FAN1.smart.tmp_start" = "20"
register "FAN1.smart.tmp_full" = "70"
register "FAN1.smart.tmp_delta" = "0"
register "FAN1.smart.smoothing" = "1"
register "FAN1.smart.pwm_start" = "20"
register "FAN1.smart.slope" = "32"
# Enable tacho reading for chassis fan.
register "FAN2.mode" = "FAN_MODE_OFF"
device pnp 2e.0 off end # Floppy
device pnp 2e.1 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.2 off end # COM2
device pnp 2e.3 off end # Parallel Port
device pnp 2e.4 on # Env Controller
io 0x60 = 0x290
io 0x62 = 0x220
irq 0x70 = 0
end
device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
end
device pnp 2e.6 on # Mouse
irq 0x70 = 12
end
device pnp 2e.7 on # GPIO
io 0x60 = 0x228 # SMI
io 0x62 = 0x300 # Simple I/O
io 0x64 = 0 # Phony resource IT8603E does not have it
irq 0x70 = 0
end
device pnp 2e.a off end # CIR
end #superio/ite/it8728f
end #device pci 14.3 # LPC
device pci 14.4 on end # PCI bridge
device pci 14.5 on end # USB OHCI
device pci 14.6 off end # Gec
device pci 14.7 off end # SD
device pci 15.0 on end # PCIe RP0: PCIEX1_1
device pci 15.1 off end # PCIe RP1: -
device pci 15.2 on end # PCIe RP2: Onboard Ethernet
device pci 15.3 off end # PCIe RP3: -
end #chip southbridge/amd/agesa/hudson
device pci 18.0 on end
device pci 18.1 on end
device pci 18.2 on end
device pci 18.3 on end
device pci 18.4 on end
device pci 18.5 on end
register "spdAddrLookup" = "
{
/* socket 0 - Channel 0 & 1 - 8-bit SPD addresses */
{ {0xA0, 0x00}, {0xA2, 0x00}, },
}"
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
end #domain
end #chip northbridge/amd/agesa/family15tn/root_complex