5f339163b0
GPIOs for I2C3 were being unset in amdinitmid if the GPIO enable table wasn't passed. It had been initialy set in amdinitreset. Pull the GPIO settings into their own file that can be used in bootblock and later stages. Change-Id: I41cd7873f8c8543c95ad8653e0a3887f7d0487a2 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19839 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
35 lines
986 B
Makefile
35 lines
986 B
Makefile
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2015-2017 Advanced Micro Devices, Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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bootblock-y += bootblock/bootblock.c
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bootblock-y += bootblock/BiosCallOuts.c
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bootblock-y += bootblock/OemCustomize.c
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bootblock-y += ec.c
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bootblock-y += gpio.c
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romstage-y += BiosCallOuts.c
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romstage-y += chromeos.c
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romstage-y += gpio.c
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romstage-y += OemCustomize.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += chromeos.c
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ramstage-y += ec.c
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ramstage-y += gpio.c
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ramstage-y += OemCustomize.c
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verstage-y += chromeos.c
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verstage-y += ec.c
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