Files
system76-coreboot/src/cpu/x86
Kevin O'Connor 5bb9fd6e4d Now that the VIA code is run above 1Meg (like other boards), it should
cache that range instead of the first 1Meg.  This reduces boot time by
about 1 second on epia-cn.

This patch also adds a MTRRphysMaskValid bit definition.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6272 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-19 06:32:35 +00:00
..
2010-12-18 23:29:37 +00:00