... and fix them in the process. The Kconfig help text seems to be a slightly better place for such documentation than a comment in Kconfig. Change-Id: I4114e17ad9c486a9de059040b0e2821540c31aad Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/23708 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
41 lines
991 B
Plaintext
41 lines
991 B
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2014 Google Inc.
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##
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## This software is licensed under the terms of the GNU General Public
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## License version 2, as published by the Free Software Foundation, and
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## may be copied, distributed, and modified under those terms.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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if BOARD_EMULATION_SPIKE_UCB_RISCV
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select SOC_UCB_RISCV
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select BOARD_ROMSIZE_KB_4096
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select DRIVERS_UART_8250MEM
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select BOOT_DEVICE_NOT_SPI_FLASH
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config MAINBOARD_DIR
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string
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default emulation/spike-riscv
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config MAINBOARD_PART_NUMBER
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string
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default "SPIKE RISCV"
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config MAX_CPUS
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int
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default 1
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config MAINBOARD_VENDOR
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string
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default "UCB"
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endif # BOARD_EMULATION_SPIKE_UCB_RISCV
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