628beff58c
Change from hardcoded "fallback/*" to using CONFIG_CBFS_PREFIX. BUG=N/A TEST=tested on fbg1701 Change-Id: Ie728d01ebb93edd88516e91528ecaaa3f139b7a9 Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36819 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
38 lines
1.2 KiB
C
38 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright (C) 2015 Intel Corp.
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* Copyright (C) 2018-2019 Eltan B.V.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef ONBOARD_H
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#define ONBOARD_H
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/* SD CARD gpio */
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#define SDCARD_CD 81 /* Not used */
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#define ITE8528_CMD_PORT 0x6E
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#define ITE8528_DATA_PORT 0x6F
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/* Define the items to be measured or verified */
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#define FSP (const char *)"fsp.bin"
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#define CMOS_LAYOUT (const char *)"cmos_layout.bin"
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#define RAMSTAGE (const char *)CONFIG_CBFS_PREFIX"/ramstage"
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#define ROMSTAGE (const char *)CONFIG_CBFS_PREFIX"/romstage"
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#define PAYLOAD (const char *)CONFIG_CBFS_PREFIX"/payload"
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#define POSTCAR (const char *)CONFIG_CBFS_PREFIX"/postcar"
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#define OP_ROM_VBT (const char *)"vbt.bin"
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#define MICROCODE (const char *)"cpu_microcode_blob.bin"
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#endif
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