642508aa9c
This reverts commitadb393bdd6. This relands commit6260bf712a. Reason for revert: The original CL did not handle some devices correctly. With the fixes: * commit36721a4(mb/google/brya: Add GPIO_IN_RW to all variants' early GPIO tables) * commit3bfe46c(mb/google/guybrush: Add GPIO EC in RW to early GPIO tables) * commit3a30cf9(mb/google/guybrush: Build chromeos.c in verstage This CL also fix the following platforms: * Change to always trusted: cyan. * Add to early GPIO table: dedede, eve, fizz, glados, hatch, octopus, poppy, reef, volteer. * Add to both Makefile and early GPIO table: zork. For mb/intel: * adlrvp: Add support for get_ec_is_trusted(). * glkrvp: Add support for get_ec_is_trusted() with always trusted. * kblrvp: Add support for get_ec_is_trusted() with always trusted. * kunimitsu: Add support for get_ec_is_trusted() and initialize it as early GPIO. * shadowmountain: Add support for get_ec_is_trusted() and initialize it as early GPIO. * tglrvp: Add support for get_ec_is_trusted() with always trusted. For qemu-q35: Add support for get_ec_is_trusted() with always trusted. We could attempt another land. Change-Id: I66b8b99d6e6bf259b18573f9f6010f9254357bf9 Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootmode.h>
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#include <boot/coreboot_tables.h>
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#include <device/mmio.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <types.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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/* The WP status pin lives on MF_ISH_GPIO_4 */
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#define WP_STATUS_PAD_CFG0 0x4838
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#define WP_STATUS_PAD_CFG1 0x483C
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#define WP_GPIO GP_E_22
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#define ACTIVE_LOW 0
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#define ACTIVE_HIGH 1
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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struct lb_gpio chromeos_gpios[] = {
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{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
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{-1, ACTIVE_HIGH, 0, "power"},
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{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
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};
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lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
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}
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int get_write_protect_state(void)
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{
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/*
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* The vboot loader queries this function in romstage. The GPIOs have
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* not been set up yet as that configuration is done in ramstage.
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* Configuring this GPIO as input so that there isn't any ambiguity
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* in the reading.
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*/
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#if ENV_ROMSTAGE
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if (CONFIG(BOARD_GOOGLE_CYAN)) {
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write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0),
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(PAD_PULL_UP_20K | PAD_GPIO_ENABLE | PAD_CONFIG0_GPI_DEFAULT));
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write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG1),
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PAD_CONFIG1_DEFAULT0);
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} else {
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gpio_input_pullup(WP_GPIO);
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}
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#endif
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/* WP is enabled when the pin is reading high. */
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if (CONFIG(BOARD_GOOGLE_CYAN)) {
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return (read32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0))
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& PAD_VAL_HIGH);
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} else {
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return !!gpio_get(WP_GPIO);
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}
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}
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static const struct cros_gpio cros_gpios[] = {
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME),
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};
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void mainboard_chromeos_acpi_generate(void)
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{
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chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
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}
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int get_ec_is_trusted(void)
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{
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/* Do not have a Chrome EC involved in entering recovery mode;
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Always return trusted. */
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return 1;
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}
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