6444bd4547
This is mostly necessary for reboot, but it doesn't hurt the boot process. On reboot explicitely reset the integrated graphics, otherwise the VGABIOS might not be able to reinitialize it properly, and you either have a still of the last pre-reboot image, garbage or an empty screen, but no text-mode. Change-Id: Ic3d6932fbaf720d88daaac7e4b09c3c0b9f0b0e2 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1178 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
111 lines
3.0 KiB
C
111 lines
3.0 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <delay.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <pc80/mc146818rtc.h>
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#define GDRST 0xc0
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static void gma_func0_init(struct device *dev)
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{
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u32 reg32;
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/* Unconditionally reset graphics */
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pci_write_config8(dev, GDRST, 1);
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udelay(50);
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pci_write_config8(dev, GDRST, 0);
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/* wait for device to finish */
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while (pci_read_config8(dev, GDRST) & 1) { };
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/* IGD needs to be Bus Master */
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reg32 = pci_read_config32(dev, PCI_COMMAND);
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pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
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pci_dev_init(dev);
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}
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static void gma_func1_init(struct device *dev)
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{
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u32 reg32;
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u8 val;
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/* IGD needs to be Bus Master, also enable IO accesss */
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reg32 = pci_read_config32(dev, PCI_COMMAND);
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pci_write_config32(dev, PCI_COMMAND, reg32 |
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PCI_COMMAND_MASTER | PCI_COMMAND_IO);
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if (!get_option(&val, "tft_brightness"))
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pci_write_config8(dev, 0xf4, val);
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else
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pci_write_config8(dev, 0xf4, 0xff);
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}
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static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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{
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if (!vendor || !device) {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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pci_read_config32(dev, PCI_VENDOR_ID));
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} else {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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}
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static struct pci_operations gma_pci_ops = {
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.set_subsystem = gma_set_subsystem,
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};
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static struct device_operations gma_func0_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = gma_func0_init,
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.scan_bus = 0,
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.enable = 0,
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.ops_pci = &gma_pci_ops,
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};
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static struct device_operations gma_func1_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = gma_func1_init,
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.scan_bus = 0,
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.enable = 0,
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.ops_pci = &gma_pci_ops,
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};
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static const struct pci_driver i945_gma_func0_driver __pci_driver = {
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.ops = &gma_func0_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x27a2,
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};
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static const struct pci_driver i945_gma_func1_driver __pci_driver = {
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.ops = &gma_func1_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x27a6,
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};
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