64925b5128
After f5ca922 (Untangle CBFS microcode updates) got merged, all
mainboard using intel apollolake, cannonlake, coffeelake, glk,
kabylake, skylake, icelake and whiskeylake get affected.
Using INTEL_LPSS_UART_FOR_CONSOLE instead of UART_DEBUG
and set default console for each platform.
BUG=N/A
TEST=Build and test on Sarien platform, by default we can still get
console from cbmem, and enable CONSOLE_SERIAL can get logs from UART
port 2.
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I550a00144cff21420537bb161c64e7a132c5d2de
Reviewed-on: https://review.coreboot.org/c/30853
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
105 lines
2.1 KiB
Plaintext
105 lines
2.1 KiB
Plaintext
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config BOARD_GOOGLE_BASEBOARD_SARIEN
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def_bool n
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select BOARD_ROMSIZE_KB_32768
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select DRIVERS_SPI_ACPI
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select DRIVERS_PS2_KEYBOARD
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select DRIVERS_USB_ACPI
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select EC_GOOGLE_WILCO
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select GENERIC_SPD_BIN
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_I2C_TPM_CR50
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select MAINBOARD_HAS_TPM2
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select SOC_INTEL_CANNONLAKE_MEMCFG_INIT
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select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_ACPI_DIS
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select SPD_READ_BY_WORD
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select SYSTEM_TYPE_LAPTOP
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select TPM2
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select MAINBOARD_USES_IFD_EC_REGION
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if BOARD_GOOGLE_BASEBOARD_SARIEN
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config CHROMEOS
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bool
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default y
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select GBB_FLAG_FORCE_DEV_SWITCH_ON
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select GBB_FLAG_FORCE_DEV_BOOT_USB
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select GBB_FLAG_FORCE_DEV_BOOT_LEGACY
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select GBB_FLAG_FORCE_MANUAL_RECOVERY
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config DIMM_MAX
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int
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default 2
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config DIMM_SPD_SIZE
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int
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default 512
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config DRIVER_TPM_I2C_BUS
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hex
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default 0x4
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config DRIVER_TPM_I2C_ADDR
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hex
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default 0x50
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config TPM_TIS_ACPI_INTERRUPT
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int
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default 82 # GPE0_DW2_18 (GPP_D18)
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config GBB_HWID
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string
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depends on CHROMEOS
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default "ARCADA TEST 3556" if BOARD_GOOGLE_ARCADA
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default "SARIEN TEST 2787" if BOARD_GOOGLE_SARIEN
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config MAINBOARD_DIR
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string
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default "google/sarien"
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config MAINBOARD_FAMILY
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string
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default "Google_Arcada" if BOARD_GOOGLE_ARCADA
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default "Google_Sarien" if BOARD_GOOGLE_SARIEN
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config MAINBOARD_PART_NUMBER
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string
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default "Arcada" if BOARD_GOOGLE_ARCADA
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default "Sarien" if BOARD_GOOGLE_SARIEN
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config MAINBOARD_VENDOR
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string
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default "Google"
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config MAX_CPUS
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int
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default 8
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config UART_FOR_CONSOLE
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int
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default 2
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config VARIANT_DIR
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string
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default "arcada" if BOARD_GOOGLE_ARCADA
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default "sarien" if BOARD_GOOGLE_SARIEN
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config DEVICETREE
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string
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default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
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config VBOOT
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select HAS_RECOVERY_MRC_CACHE
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select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
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select VBOOT_LID_SWITCH
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endif # BOARD_GOOGLE_BASEBOARD_SARIEN
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